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posted by janrinok on Friday May 20 2022, @09:56AM   Printer-friendly
from the dont-put-some-of-your-eggs-in-too-many-baskets dept.

Tech war: China bets on open-source RISC-V for chip design to minimise potential damage from 'being cut off' by US sanctions

A growing number of Chinese chip design firms have adopted open-source RISC-V in their chip designs as an alternative to Intel's proprietary X86 and Arm's architecture, in a bid to minimise potential damage from US sanctions and to save on licensing fees.

[....] "[This] gives Chinese companies access to a global open standard instruction set architecture (ISA) ecosystem," said Stewart Randall, head of electronics and embedded software at consultancy Intralink. "So Chinese companies can have access to, and create, their own cores or chips based on it."

However, some industry experts said China's adoption of open-source RISC-V architecture would not shield them from all US sanction risks, as America still holds the trump card when it comes to electronic design automation (EDA) tools, the key software needed for chip design, as well as chip manufacturing technologies.

If you really want to create your own cores from scratch, without licensing anyone else's IP, is it truly possible to do so with RISC-V?

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Tech war: China bets on open-source RISC-V for chip design to minimise potential damage from 'being cut off' by US sanctions


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  • (Score: 0) by Anonymous Coward on Friday May 20 2022, @11:46AM (5 children)

    by Anonymous Coward on Friday May 20 2022, @11:46AM (#1246542)

    "Somehow,Intel won."
        Being code translatable-ish from the 8080 and the design win for the IBM pc didn't hurt.
        Sometimes just having good enough tech makes other things the deciding factor.
        Like code base compatibility supported by some of the kludges.

    Risc-V could end up that way.
      How good are the open implementations. Do they include all the tricks that a modern processor uses to go fast?
      It takes a lot of tricks to get a classic single instruction stream cpu clocking multiGhz with multiple instructions per clock.

    IF SOapbox,present()
    The can you go it alone question probably applies to everybody. There are critical pieces spread over the world. EDA tools for design, sim, and process modeling, chip architects in many different directions, fabrication tools and knowhow, raw materials, packaging, and systems integration to make the stuff do something useful. I'd bet there is no single country that can totally go it alone. Humanity did amazing things when we all worked together. Too bad we can't agree on a common set of rules. Attempts by one cuontry or another to get ahead are lowering the living standard for all. The get aheaders included.
    ENDIF

  • (Score: 3, Informative) by driverless on Friday May 20 2022, @12:55PM (4 children)

    by driverless (4770) on Friday May 20 2022, @12:55PM (#1246555)

    Risc-V could end up that way.
        How good are the open implementations.

    If by "open" you mean "Chinese implementations of the open Risc-V architecture", they're pretty bad. Actually, really bad: Buggy hardware, buggy software, almost nonexistent documentation, and poor performance. Imagine buying some random x86 box off Aliexpress which outside of the CPU is full of semi-unknown support chips and partly-debugged circuitry, and that's the level of the hardware. We have a couple of Risc-V devices here and each one has been a massive headache just to get going, with a lot of the capabilities unexplored for lack of documentation and huge amounts of time wasted discovering and working around hardware bugs. The icing on the cake is that each one only seems to last 6-12 months before it's abandoned and replaced with something else with a new set of bugs and problems.

    It's really frustrating to have this nice new architecture available but the implementations are so totally underwhelming in terms of functionality, documentation, and performance. So at the moment I think it's more a bargaining chip than anything else, and I haven't caught wind of anything new coming down the track that would change that.

    • (Score: 1, Insightful) by Anonymous Coward on Friday May 20 2022, @08:54PM

      by Anonymous Coward on Friday May 20 2022, @08:54PM (#1246694)

      So, just like no-name ARM SoCs but with RISC-V cores. Hmmm...

    • (Score: 2) by DannyB on Saturday May 21 2022, @12:25AM

      by DannyB (5839) Subscriber Badge on Saturday May 21 2022, @12:25AM (#1246740) Journal

      It is a mistake to assume that bad implementations of an idea at present mean it will always be bad.

      These new fangled automobile thingies will never be a success. They are noisy, smelly and unreliable. They make too much noise. You can actually break your arm if it backfires while you are crank starting it. And worst of all -- they frighten the horses! I can confidently predict that the beautiful horse and buggy will be with us forever and these new automobile thingies are just a temporary fad.

      --
      I get constant rejection even though the compiler is supposed to accept constants.
    • (Score: 0) by Anonymous Coward on Sunday May 22 2022, @05:21PM (1 child)

      by Anonymous Coward on Sunday May 22 2022, @05:21PM (#1247054)

      i find it amazing that you guys go thru all the trouble.
      i hope, at least, you're getting this garba... err.. stuff for free!
      and thx for the heads-up. somebody's got to look to see...

      • (Score: 0) by Anonymous Coward on Sunday May 22 2022, @05:51PM

        by Anonymous Coward on Sunday May 22 2022, @05:51PM (#1247059)

        ah, also, if the butcher starts eating his/her own sausages then ... well ... i guess i'll eat them too.