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posted by janrinok on Monday May 22, @05:31PM   Printer-friendly

https://www.devever.net/~hl/regmap

If you've ever had to write a program which interfaces directly with hardware — perhaps while writing a program for an MCU or embedded system or a kernel driver — you may have noticed a few common patterns in register map behaviour and design. I'm not sure anyone has ever really collected them together, so I decided to make a list of all the ones I can think of.


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  • (Score: 3, Informative) by owl on Monday May 22, @10:25PM (2 children)

    by owl (15206) Subscriber Badge on Monday May 22, @10:25PM (#1307487)

    The first time I came across this I was stunned. Why did hardware need a /dev/null?

    Nor did I, when I first encountered it on the Dec Alpha CPU. One of it's registers was wired up to always read zero, and always consume and throw away a write without complaint (effectively a /dev/null register).

    Then I dug in more, and its usefulness was in synthesizing additional addressing modes from the small set of hardware address modes the chip actually provided.

    I.e., (and this is largely from memory, so I may be off a bit) the Alpha architecture did not provide a native "load 64-bit word from address X stored in register Rx". Instead it provided a "load word from address stored in Rx indexed by offset stored in Ry" as a native mode. The "load from literal address" mode was synthesized by using R0 (assuming R0 was the "read as zero, consume all writes" register) as Ry in the addressing mod.

    So when you wrote: load R5,[R16]

    to load R5 from the address in R16, the actual CPU instruction executed was: load R5, [R16+R0]

    With R0 providing a "zero", which makes the offset addition a null operation, resulting in a load from address in R16.

    In the end, the Alpha had something like only 4 or 8 actual hardware addressing modes, but with creative use of the "zero register" the programmers had something like 16 or 24 different possible "addressing modes" that they could actually use.

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  • (Score: 4, Informative) by sjames on Monday May 22, @11:15PM (1 child)

    by sjames (2882) on Monday May 22, @11:15PM (#1307502) Journal

    In addition, a zero register is a good way to initialize an accumulator without having an extra instruction. Writing to the zero register is a cheap to implement NOP. Add that to the inexpensive addressing flexibility and you get a lot of bang for the buck from the zero register.

    • (Score: 3, Informative) by owl on Tuesday May 23, @02:17AM

      by owl (15206) Subscriber Badge on Tuesday May 23, @02:17AM (#1307527)

      Now that you mention it, I think the Alpha's "nop" instruction was actually something like

      add r0,r0,r0

      (assuming r0 was the "always zero" register), that would add zero to zero and store the answer in the register that was always zero. The result, a "NOP" instruction, without having to explicitly have an actual "NOP" instruction built into the hardware.