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posted by hubie on Tuesday August 13, @10:37AM   Printer-friendly

Arthur T Knackerbracket has processed the following story:

In separate statements, ASUS and MSI announced their plans to deliver the new microcode for 13th and 14th Gen Raptor Lake Core family of CPUs over the course of August.

The updated CPU microcode, which should be finalized in the coming days, is supposed to stop Intel's wobbly desktop microprocessors from crashing at normal clock speeds (an "instability" as the x86 giant puts it) to frying themselves and causing permanent damage if not complete failure.

Apparently, the original microcode for Raptor Lake processors applied too much voltage to chips. While increasing voltage can make it possible to hit higher clock speeds with ironclad stability, too much voltage can be dangerous and degrade the silicon.

Although microcode updates are developed by Intel, they have to be distributed via motherboard BIOSes developed by individual motherboard vendors, including DIY brands like ASUS and MSI, and also OEMs. When it comes to microcode patches, Intel (and its rival AMD) can't guarantee when users will receive it or if all users will even get it at all, since it is up to individual motherboard makers to issue new BIOS versions.

That's not ideal for both Chipzilla and owners of Raptor Lake CPUs, as the longer it takes for the microcode to disseminate, the more opportunities there are for more chips to fail, providing more fuel for potential class action lawsuits.

However, at least ASUS and MSI seem to be working fast on updating their motherboards, with both saying that they'll start distributing BIOSes with the new microcode next week. Intel said the microcode itself wouldn't be done until the middle of the month.

[...] "The two tech companies have yet to update any 600 series boards, however. For its part, Gigabyte says it expects all of its motherboards to get updated by the second week of September at the latest, a representative toldThe Register.


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  • (Score: 3, Interesting) by stormwyrm on Wednesday August 14, @06:26AM (5 children)

    by stormwyrm (717) on Wednesday August 14, @06:26AM (#1368538) Journal
    I have a very small RISC-V laptop, a LicheePi Console 4A [sipeed.com], and I use it as a secondary machine as it's very small and easy to bring around. As far as raw CPU power is concerned it seems to be at around 2008 to 2010 desktop PC level, but it does seem to have rather powerful dedicated silicon for 2D and 3D graphics acceleration and NPU which seems to be relatively underutilised by the software available. Software is even further from the level of ARM64 maturity, but I think of this as a challenge rather than a problem. I can already make use of it for some of the software development tasks that do. It feels a lot like the Toshiba Libretto I had around 1997.
    --
    Numquam ponenda est pluralitas sine necessitate.
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  • (Score: 2) by jasassin on Wednesday August 14, @06:43AM (3 children)

    by jasassin (3566) <jasassin@gmail.com> on Wednesday August 14, @06:43AM (#1368539) Homepage Journal

    So many questions here... what OS do you run on it? What is its primary function? Do you have to compile your own software often, and what's the success to failure ratio if you do attempt to compile a program? What do you think of RiscV in general? Is it a pipe dream or is it plausible? What was your biggest problem/deal breaker with RiscV?

    I have never owned any RiscV systems so I am ignorant.

    --
    jasassin@gmail.com GPG Key ID: 0xE6462C68A9A3DB5A
    • (Score: 3, Informative) by stormwyrm on Thursday August 15, @03:17AM (2 children)

      by stormwyrm (717) on Thursday August 15, @03:17AM (#1368631) Journal
      As for the OS I run on it, it's RevyOS [github.com], basically a patched Debian Bookworm that is built specifically for RISC-V. As for its primary function, it's basically a simple dev machine that I use for my personal projects, as well as a platform for me to learn more about how these systems work. I have used it to do some coding with Python, Ruby, and Rust, as well as some embedded systems programming for Arduinos (not using the official Arduino IDE though, but maybe I'll see about building it on RISC-V) and the CH32v003 microcontroller, itself a 32-bit RISC-V core, but very cheap at around 10ยข each. The only thing I haven't yet been able to do with it is my FPGA experiments, because there is no RISC-V build of the OSS CAD Suite, and even if there were I doubt that it's got enough juice to do even a simple Verilog synthesis in a reasonable amount of time. They have an ARM64 build and it is slow on my Pine A64 LTS, taking about ten minutes to synthesize my FPGA video demo [soylentnews.org]. Virtualisation is all well and good but real silicon is always more fun. As for compiling my own software, I've had to recompile the kernel a few times to add in functionality such as USB HID raw access which is needed by FIDO2 2FA like that provided by my Yubico USB keys, as well as stuff like NDIS to do USB tethering on phones. These sorts of things seem to be often disabled by SBC kernels (even ARM-based ones) for some reason, though I don't think there is any good reason to turn them off. This is something I needed to use a big computer to do, for some stupid reason it seems to be impossible right now to self-host a kernel compile because the installed gcc doesn't have support for certain privileged instructions used by the Linux kernel, which is beyond idiotic to me. In any case, it's not really that feasible to do as of now because if I manage to build a broken kernel there is no way to unbrick the system except by connecting to a serial console accessible by clipping a USB to serial converter to some TX/RX/GND holes (which really should have been soldered with pins) under a hatch at the underside of the laptop. It's as though you needed a second computer with a serial console to access the BIOS and even GRUB on a normal PC. I'm wondering if there's a version of OpenSBI (that's basically the RISC-V analog of a PC's BIOS) and Uboot (a commonly used bootloader for SBCs of all types, including RISC-V and ARM) that can use the screen and keyboard. As for my thoughts on RISC-V in general, it's an interesting architecture to be sure, but it's got a ways to go before it can catch up to x86 or even ARM. One of the biggest problems I've had is the general sluggishness and instability of web applications, but I suppose that's a very common issue when using other CPUs as well. I don't know anyone who uses stuff like Gmail, Twitter, Tik-Tok, Instagram, etc. directly via their phone's web browser: they have to fall back on apps because the browser cannot tolerate the code bloat.
      --
      Numquam ponenda est pluralitas sine necessitate.
      • (Score: 2) by hendrikboom on Sunday August 18, @01:57AM (1 child)

        by hendrikboom (1125) on Sunday August 18, @01:57AM (#1369077) Homepage Journal

        I looked at the list of Devuan images on ARM system.
        There are lots of ARM systems, and the all seem to need their own specific Devuan system.
        It looks like distros have to support a lot of installers for machine with very similar instruction sets.

        With traditional x86 PCs, a very few images seem to do for most of them, because there is very little difference in the way they boot up (mostly just 'legacy' and/or UEFI).

        Is the boot-up landscape on RISC/v relatively sparse, or does every RISC/V board and computer need its own individual boot-up procedure?

        • (Score: 3, Informative) by stormwyrm on Sunday August 18, @06:01AM

          by stormwyrm (717) on Sunday August 18, @06:01AM (#1369089) Journal

          Mostly the differences between the specific versions geared towards the various SBCs have to do with the different Devicetrees that need to be loaded on bootup. These devicetrees are files that describe what specific hardware is present on the board and what settings to use for them so that the bootloader and the kernel can configure and use them properly. They're not used on PCs because there are various standard auto-configuration protocols like ACPI that accomplish the same thing. Before devicetrees were introduced, a distro maintainer needed to patch the bootloader and kernel specifically to hardcode the hardware configuration of the target SBC. Today, they can just set configuration switches for them to load the appropriate devicetree for the hardware meant to be used. For the average user it amounts to the same thing (downloading a version specific to the SBC you want to use) but the real differences between the images for different SBCs having the same CPU architecture family are in general trivial. This would go away if there were a standard where the bootloader can obtain the devicetree for a board (e.g. from a standard interface to an EEPROM), but there is no such standard at this time.

          I've just begun looking into the way the boot-up procedure on RISC-V systems is supposed to work and it seems that RISC-V International has published standards for this. They have something called the Supervisor Binary Interface (SBI) that is basically the analog of a PC's BIOS that every non-trivial RISC-V system (i.e. one that is intended to be more than a small microcontroller) is supposed to have and like the PC BIOS it does well-defined things on boot. I believe ARM may have something similar but I haven't yet been able to look as closely into that yet. There is a very widely-used bootloader called U-boot for both ARM and RISC-V that is basically the de facto standard for booting Linux on SBCs.

          --
          Numquam ponenda est pluralitas sine necessitate.
  • (Score: 2) by hendrikboom on Thursday September 05, @10:35PM

    by hendrikboom (1125) on Thursday September 05, @10:35PM (#1371456) Homepage Journal

    Is the keyboard of standard size? I.e., are the keys the usual distance apart, or is it a reduced size?