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posted by cmn32480 on Monday July 20 2015, @07:33PM   Printer-friendly
from the does-it-run-windows? dept.

Currently, the world's most powerful supercomputers can ramp up to more than a thousand trillion operations per second, or a petaflop. But computing power is not growing as fast as it has in the past. On Monday, the June 2015 listing of the Top 500 most powerful supercomputers in the world revealed the beginnings of a plateau in performance growth.
...
The development rate began tapering off around 2008. Between 2010 and 2013, aggregate increases ranged between 26 percent and 66 percent. And on this June's list, there was a mere 17 percent increase from last November.
...
Despite the slowdown, many computational scientists expect performance to reach exascale, or more than a billion billion operations per second, by 2020.

Hmm, if they reach exascale computing will the weatherman finally be able to predict if it's going to rain this afternoon? Because he sucks at that now.


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  • (Score: 4, Informative) by takyon on Monday July 20 2015, @09:23PM

    by takyon (881) <{takyon} {at} {soylentnews.org}> on Monday July 20 2015, @09:23PM (#211590) Journal

    http://www.ncsa.illinois.edu/ [illinois.edu]
    http://www.livescience.com/6392-9-super-cool-supercomputers.html [livescience.com]
    http://www.information-age.com/industry/hardware/123458374/5-real-life-applications-supercomputers-you-never-knew-about [information-age.com]
    http://www.extremetech.com/extreme/122159-what-can-you-do-with-a-supercomputer/2 [extremetech.com]

    Biotechnology such as protein folding is my favorite application.

    Here's another reason that supercomputing may be slowing down: applications need to adapt to new architectures. Manycore (Intel Xeon Phi) and GPU coprocessing require rewritten code.

    http://www.marketwatch.com/story/chinas-bevy-of-supercomputers-goes-unused-2014-07-15 [marketwatch.com]
    http://www.hpcwire.com/2014/07/17/dd/ [hpcwire.com]

    Lu conceded ground on one point, however – software development – acknowledging that “China is still behind in software, as high-efficiency software development depends on the overall scientific and technological level of the nation.”

    Another critique from MarketWatch’s Laura He goes even further, questioning not just China’s software prowess, but taking aim at the troublingly low utilization rates of its most expensive number-crunchers. The author cites a report from the NewEase Chinese new portal that claims less than 20 percent of China’s supercomputers have been used for scientific research.

    http://www.hpcwire.com/2012/12/12/programming_the_xeon_phi/ [hpcwire.com]

    Farber points out the Phi is essentially an x86 manycore SMP processor and supports the various parallel programming models — OpenMP and MPI, in particular. That means that most applications can get up and running with a recompilation, using Intel’s own developer toolset.

    But according to a previous analysis by Farber, the limited memory capacity on the devices will limit performance for typical OpenMP and MPI applications. According to him, to get performance out of the hardware, you need to make sure you are taking advantage of coprocessor’s many cores and its muscular vector unit. “Massive vector parallelism is the path to realize that high performance,” writes Farber.

    Although there are 60 cores available on the Phi hardware Dr Dobb’s obtained (a pre-production part, apparently), four-way hyperthreading allows for up to 240 threads per chip. During testing it was determined that the application should have at least half of the available threads in use. It is tempting to think that non-vector codes could also benefit from the Xeon Phi, powered by thread parallelism alone, but Farber thinks that such applications will not be performance standouts on this platform.

    Since the Phi is a PCIe device with just a few gigabyte of memory, it’s also important to minimize data transfer back and forth between the CPU’s main memory and local store on the coprocessor card. That means doing as little data shuffling as possible and making sure the coprocessor has enough contiguous work to do using local memory. In fact, Farber maintains the a lot of the design effort to boost performance on the Phi will revolve around minimizing data transfers.

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