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posted by chromas on Monday July 23 2018, @10:22PM   Printer-friendly
from the drm dept.

Hugo Landau has written a blog post about why Intel will never let hardware owners control the Management Engine. The Intel Managment Engine (ME) is a secondary microprocessor ensconced in recent Intel x86 chips, running an Intel-signed, proprietary, binary blob which provides remote access over the network as well as direct access to memory and peripherals. Because of the code signing restrictions enforced by the hardware, it cannot be modified or replaced by the user.

Intel/AMD will never allow machine owners to control the code executing on the ME/PSP because they have decided to build a business on preventing you from doing so. In particular, it's likely that they're actually contractually obligated not to let you control these processors.

The reason is that Intel literally decided to collude with Hollywood to integrate DRM into their CPUs; they conspired with media companies to lock you out of certain parts of your machine. After all, this is the company that created HDCP.

This DRM functionality is implemented on the ME/PSP. Its ability to implement DRM depends on you not having control over it, and not having control over the code that runs on it. Allowing you to control the code running on the ME would directly compromise an initiative which Intel has been advancing for over a decade.


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  • (Score: 3, Interesting) by RS3 on Monday July 23 2018, @10:33PM (7 children)

    by RS3 (6367) on Monday July 23 2018, @10:33PM (#711471)

    Does the RISC-V https://en.wikipedia.org/wiki/RISC-V [wikipedia.org] CPU have an ME? No? Oh.

    Great, so I can't do anything with or about the IME, but the criminals can: https://www.tomshardware.com/news/intel-me-new-firmware-bugs,37492.html [tomshardware.com].

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  • (Score: 5, Informative) by requerdanos on Monday July 23 2018, @11:59PM (1 child)

    by requerdanos (5997) on Monday July 23 2018, @11:59PM (#711489) Journal

    Does the RISC-V https://en.wikipedia.org/wiki/RISC-V [wikipedia.org] [wikipedia.org] CPU have an ME? No?

    I, for one, would love to see a desktop version of something like this Gigabyte ARM server: https://b2b.gigabyte.com/ARM-Server/R120-T33-rev-110 [gigabyte.com]

    It has a Cavium ThunderX 64-bit ARM (aarch64) 48-core CPU, DDR4 RAM, and no management engine or other factory malware.

    Alas, like the RISC-V boards, it costs about as much as a good used car, or a secondhand travel trailer.

    I would love to see cheap (Chinese, perhaps? Anyone in Shenzhen listening?) ATX or mATX commodity boards with non-x86 processors (fast ones, not slow junk) more in the cost range of US$100-$250.

    • (Score: 2) by coolgopher on Tuesday July 24 2018, @02:20AM

      by coolgopher (1157) on Tuesday July 24 2018, @02:20AM (#711520)

      Somehow wrangle a 16x PCI-Express slot onto that and you could have a real winner.

  • (Score: 1, Disagree) by Anonymous Coward on Tuesday July 24 2018, @01:38AM (3 children)

    by Anonymous Coward on Tuesday July 24 2018, @01:38AM (#711512)
    • (Score: 2) by coolgopher on Tuesday July 24 2018, @02:21AM (2 children)

      by coolgopher (1157) on Tuesday July 24 2018, @02:21AM (#711521)

      Link no worky :(

      • (Score: 5, Informative) by requerdanos on Tuesday July 24 2018, @02:56AM (1 child)

        by requerdanos (5997) on Tuesday July 24 2018, @02:56AM (#711545) Journal

        RISC Architecture: Understanding the Facts

        Link no worky :(

        This was a FUD piece written by ARM (the R in ARM stands for RISC, in case you missed the relevance). It was so egregious that ARM pulled it quickly after the proper trouncing they got in the editorial tech press, which is why the link doesn't work.

        Phoronix has a brief write-up [phoronix.com] of ARM's anti-RISC V claims from the hit job before it was taken down.

        Anytime someone tells you some variation of "Get the truth" or "Get the facts", they are about to feed you propaganda that is either completely dishonest, or a mixture of truth and lies that's got a spin to favor their preferred position. This was no exception.

        • (Score: 2) by coolgopher on Tuesday July 24 2018, @04:14AM

          by coolgopher (1157) on Tuesday July 24 2018, @04:14AM (#711569)

          ARM, aka Acorn RISC Machine, later Advanced RISC Machine.

          The RISC-V must be pretty decent if they're feeling threatened.

  • (Score: 0) by Anonymous Coward on Tuesday July 24 2018, @01:38PM

    by Anonymous Coward on Tuesday July 24 2018, @01:38PM (#711709)

    Does the RISC-V https://en.wikipedia.org/wiki/RISC-V [wikipedia.org] [wikipedia.org] CPU have an ME?

    Since RISC-V is not a CPU, but an instruction set architecture, this question is about as meaningful as the question whether the x86 instruction set architecture has a management engine. Which is, not meaningful at all.

    A processor implementing RISC-V may or may not have an equivalent to Intel's ME. That is up to whoever implements the processor. Indeed, a processor (RISC-V or otherwise) could even have a RISC-V based ME!