| Title | 2D Materials Could Allow for Sub-5nm Node Transistors | |
| Date | Saturday July 15 2017, @01:30AM | |
| Author | mrpg | |
| Topic | ||
| from the think-of-the-vacuum-tubes dept. | ||
Imec researchers have described a method of creating smaller transistors using materials such as 2D black phosphorus (phosphorene):
Designers can extend Moore's Law scaling beyond the 5-nanometer node by choosing two-dimensional anisotropic (faster with the grain) materials such as monolayers of black phosphorus, according to Imec (Leuven, Belgium). Researchers from the nonprofit semiconductor research institute described their findings at the annual Imec Technology Forum, held in San Francisco on the eve of Semicon West (July 11-13).
Imec's demonstration project focused on field-effect transistors for high-performance logic applications as part of its Core CMOS program. Using co-optimization at the material, device, and circuit levels, Imec and its collaborators proved the concept using 2-D monolayers of anisotropic black phosphorus with a smaller effective mass in the transport direction. The black phosphorus was sandwiched between interfacial layers of low-k dielectric, with stacked dual gates deployed atop high-k dielectrics to control the atomically thin channels.
Imec demonstrated the co-optimization approach at the 10-nm node but says the architecture could function with sub-half volt (<0.5-V) power supplies and an effective oxide thickness of less than 50 angstroms (0.5 nm), allowing its FETs to extend Moore's Law for high-performance logic applications below the 5-nanometer node.
| Links |
printed from SoylentNews, 2D Materials Could Allow for Sub-5nm Node Transistors on 2024-04-24 01:47:24