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takyon writes:

Qualcomm Invests in RISC-V Startup SiFive

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups.

Last fall, Esperanto Technologies announced a $58 million funding round. The chip IP vendor is incorporating more than 1,000 RISC-V cores onto a single 7-nm chip. Data storage specialist Western Digital is an early investor in Esperanto, Mountain View, Calif.

This week, another RISC-V startup, SiFive, announced a $65.4 million funding round that included new investor Qualcomm Ventures. SiFive, San Mateo, Calif., has so far raised more than $125 million, and is seen as a challenger to chip IP leader Arm.

Observers note that wireless modem leader Qualcomm is among Arm's biggest customers, making its investment in SiFive intriguing. Also participating in the Series D round were existing investors Chengwei Capital of Shanghai along with Sutter Hill Ventures and Spark Capital. Intel Capital and Western Digital also were early investors.

Also at EE Times.

See also: SiFive Acquires USB 2.0 and 3.x IP Portfolio to Strengthen RISC-V SoCs

Previously: RISC-V Projects to Collaborate
SiFive and UltraSoC Partner to Accelerate RISC-V Development Through DesignShare
SiFive Introduces RISC-V Linux-Capable Multicore Processor
SiFive HiFive Unleashed Not as Open as Previously Thought
Linux Foundation and RISC-V Proponents Launch CHIPS Alliance

Separately, a handful of RISC-V proponents launched the CHIPS Alliance, a project of the Linux Foundation to develop a broad set of open-source IP blocks and tools for the instruction set architecture. Initial members include Esperanto, Google, SiFive, and Western Digital. CHIPS stands for Common Hardware for Interfaces, Processors, and Systems.

Esperanto Technologies and SiFive look like the names to watch.

Related: First Open Source RISC-V Implementations Become Available
Western Digital Unveils RISC-V Controller Design
Raspberry Pi Foundation Announces RISC-V Foundation Membership
Western Digital Publishes RISC-V "SweRV" Core Design Under Apache 2.0 License

Original Submission

1. "takyon" - https://soylentnews.org/~takyon/
2. "Qualcomm Invests in RISC-V Startup SiFive" - https://www.hpcwire.com/2019/06/07/qualcomm-invests-in-risc-v-startup-sifive/
3. "Esperanto Technologies" - https://www.hpcwire.com/off-the-wire/esperanto-technologies-secures-58-million-in-series-b-investment-for-ai-chips/
4. "SiFive" - https://www.sifive.com/
5. "EE Times" - https://www.eetimes.com/document.asp?doc_id=1334791
6. "SiFive Acquires USB 2.0 and 3.x IP Portfolio to Strengthen RISC-V SoCs" - https://www.anandtech.com/show/14379/sifive-acquires-usb-20-and-3x-ip-portfolio
7. "RISC-V Projects to Collaborate" - https://soylentnews.org/article.pl?sid=17/01/30/0219213
8. "SiFive and UltraSoC Partner to Accelerate RISC-V Development Through DesignShare" - https://soylentnews.org/article.pl?sid=17/09/09/1945243
9. "SiFive Introduces RISC-V Linux-Capable Multicore Processor" - https://soylentnews.org/article.pl?sid=18/02/04/1640230
10. "SiFive HiFive Unleashed Not as Open as Previously Thought" - https://soylentnews.org/article.pl?sid=18/06/26/0115241
11. "Linux Foundation and RISC-V Proponents Launch CHIPS Alliance" - https://soylentnews.org/article.pl?sid=19/03/14/2159217
12. "First Open Source RISC-V Implementations Become Available" - https://soylentnews.org/article.pl?sid=16/07/15/1155243
13. "Western Digital Unveils RISC-V Controller Design" - https://soylentnews.org/article.pl?sid=18/12/05/0526241
14. "Raspberry Pi Foundation Announces RISC-V Foundation Membership" - https://soylentnews.org/article.pl?sid=19/01/12/1648251
15. "Western Digital Publishes RISC-V "SweRV" Core Design Under Apache 2.0 License" - https://soylentnews.org/article.pl?sid=19/02/16/0245244
16. "Original Submission" - https://soylentnews.org/submit.pl?op=viewsub&subid=34316

printed from SoylentNews, Qualcomm Invests in RISC-V Startup SiFive on 2024-04-24 16:50:31