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takyon [soylentnews.org] writes:

Samsung has added a so-called "4nm" process [tomshardware.com] to its roadmap:

The 4LPP process generation will be Samsung's first to use a "Gate All Around FET" (GAAFET) transistor structure, with Samsung's own implementation dubbed "Multi Bridge Channel FET" (MBCFET). The technology uses a "Nanosheet" device to overcome the physical limitations of the FinFET architecture.

Source [samsung.com].

But how many transistors per square millimeter [soylentnews.org] is it?

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