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takyon [soylentnews.org] writes:

HoloLens 2 can learn [tomshardware.com]!

Microsoft announced that the second generation of the HoloLens' Holographic Processing Unit [tomshardware.com] (HPU) will contain a deep learning accelerator. When Microsoft first unveiled the HoloLens, it said that it comes with a special kind of processor, called an HPU, that can accelerate the kind of "holographic" content displayed by the HMD. The HPU is primarily responsible for processing the information coming from all the on-board sensors, including a custom time-of-flight depth sensor, head-tracking cameras, the inertial measurement unit (IMU), and the infrared camera.

The first generation HPU contained 24 digital signal processors (DSPs), an Atom processor, 1GB of DDR3 RAM, and 8MB of SRAM cache. The chip can achieve one teraflop per second for under 10W of power, with 40% of that power going to the Atom CPU. The first HPU was built on a 28nm planar process, and if the next-generation HPU will be built on a 14/16nm or smaller FinFET process, the increase in performance could be significant. However, Microsoft has not yet revealed what process node will be used for the next-generation HPU.

What we do know so far about the second-gen HPU is that it will incorporate an accelerator for deep neural networks (DNNs). The deep learning accelerator is designed to work offline and use the HoloLens' battery, which means it should be quite efficient, while still providing significant benefits to Microsoft's machine learning code.

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