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Western Announces 64-Layer 3D QLC NAND With 768 Gb Per Die, to be Shown at Flash Memory Summit

Accepted submission by takyon at 2017-07-26 01:21:06
Hardware

Both Toshiba (or whomever ends up buying Toshiba's memory fabrication assets) and Western Digital have both recently announced plans to produce 3D QLC [anandtech.com] (four bits per cell) NAND:

Western Digital's SanDisk subsidiary and Toshiba have a long history of jointly developing and manufacturing NAND flash memory. While that relationship has been strained [anandtech.com] by Toshiba's recent financial troubles and attempts to sell of their share of the memory business, the companies are continuing to develop new flash memory technology and are still taking turns making new announcements. In recent months both companies have started sampling SSDs using their 64-layer BiCS3 TLC 3D NAND [anandtech.com] and have announced that their next generation BiCS4 3D NAND [anandtech.com] will be a 96-layer design.

Yesterday Western Digital made a small announcement about their other main strategy for increasing density: storing more bits per memory cell. Western Digital will introduce four bit per cell QLC parts built on their 64-layer BiCS3 process, with a capacity of 768Gb (96GB) per die. This is a substantial increase over the 512Gb BiCS3 TLC parts that will be hitting the market soon, and represents not only an increase in in bits stored per memory cell but an increase in the overall size of the memory array. These new 3D QLC NAND parts are clearly intended to offer the best price per GB that Western Digital can manage, but Western Digital claims performance will still be close to that of their 3D TLC NAND. Western Digital's announcement did not mention write endurance, but Toshiba's earlier announcement [anandtech.com] of 3D QLC NAND claimed endurance of 1000 program/erase cycles, far higher than industry expectations of 100-150 P/E cycles for 3D QLC and comparable to 3D TLC NAND.

Western Digital will showcase SSDs and removable flash media using QLC NAND at the Flash Memory Summit from August 8-10.

Will QLC NAND endurance become a bigger issue than it is with TLC? Will this be used primarily for high density cold storage like Facebook has asked for [tomshardware.com]?

Previously: Toshiba Teasing QLC 3D NAND and TSV for More Layers [soylentnews.org]
SK Hynix Developing 96 and 128-Layer TLC 3D NAND [soylentnews.org]
Western Digital Announces 96-Layer 3D NAND, Including Both TLC and QLC [soylentnews.org]
Toshiba's 3D QLC NAND Could Reach 1000 P/E Cycles [soylentnews.org]
Toshiba Develops 512 GB and 1 TB Flash Chips Using TSV [soylentnews.org]


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