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takyon [soylentnews.org] writes:

Qualcomm Invests in RISC-V Startup SiFive [hpcwire.com]

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups.

Last fall, Esperanto Technologies [hpcwire.com] announced a $58 million funding round. The chip IP vendor is incorporating more than 1,000 RISC-V cores onto a single 7-nm chip. Data storage specialist Western Digital is an early investor in Esperanto, Mountain View, Calif.

This week, another RISC-V startup, SiFive [sifive.com], announced a $65.4 million funding round that included new investor Qualcomm Ventures. SiFive, San Mateo, Calif., has so far raised more than $125 million, and is seen as a challenger to chip IP leader Arm.

Observers note that wireless modem leader Qualcomm is among Arm's biggest customers, making its investment in SiFive intriguing. Also participating in the Series D round were existing investors Chengwei Capital of Shanghai along with Sutter Hill Ventures and Spark Capital. Intel Capital and Western Digital also were early investors.

Also at EE Times [eetimes.com].

See also: SiFive Acquires USB 2.0 and 3.x IP Portfolio to Strengthen RISC-V SoCs [anandtech.com]

Previously: RISC-V Projects to Collaborate [soylentnews.org]
SiFive and UltraSoC Partner to Accelerate RISC-V Development Through DesignShare [soylentnews.org]
SiFive Introduces RISC-V Linux-Capable Multicore Processor [soylentnews.org]
SiFive HiFive Unleashed Not as Open as Previously Thought [soylentnews.org]
Linux Foundation and RISC-V Proponents Launch CHIPS Alliance [soylentnews.org]

Separately, a handful of RISC-V proponents launched the CHIPS Alliance, a project of the Linux Foundation to develop a broad set of open-source IP blocks and tools for the instruction set architecture. Initial members include Esperanto, Google, SiFive, and Western Digital. CHIPS stands for Common Hardware for Interfaces, Processors, and Systems.

Esperanto Technologies and SiFive look like the names to watch.

Related: First Open Source RISC-V Implementations Become Available [soylentnews.org]
Western Digital Unveils RISC-V Controller Design [soylentnews.org]
Raspberry Pi Foundation Announces RISC-V Foundation Membership [soylentnews.org]
Western Digital Publishes RISC-V "SweRV" Core Design Under Apache 2.0 License [soylentnews.org]

Original Submission