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takyon [soylentnews.org] writes:

GlobalFoundries and SiFive to Design HBM2E Implementation on 12LP/12LP+ [anandtech.com]

GlobalFoundries and SiFive announced on Tuesday that they will be co-developing an implementation of HBM2E memory for GloFo's 12LP and 12LP+ FinFET process technologies. The IP package will enable SoC designers to quickly integrate HBM2E support into designs for chips that need significant amounts of bandwidth.

The HBM2E implementation by GlobalFoundries and SiFive includes the 2.5D packaging (interposer) designed by GF, with the HBM2E interface developed by SiFive. In addition to HBM2E technology, licensees of SiFive also gain access to the company's RISC-V portfolio and DesignShare IP ecosystem for GlobalFoundries' 12LP/12LP+, which will enable SoC developers to build RISC-V-based devices GloFo's advanced fab technology.

GlobalFoundries and SiFive suggest that the 12LP+ manufacturing process and the HBM2E implementation will be primarily used for artificial intelligence training and inference applications for edge computing, with vendors looking to optimize for TOPS-per-milliwatt performance.

2.5D/3D packaging [wikipedia.org].

Related: Samsung Announces "Flashbolt" HBM2E (High Bandwidth Memory) DRAM packages [soylentnews.org]
SK Hynix Announces HBM2E Memory for 2020 Release [soylentnews.org]
GlobalFoundries Develops "12LP+" Fabrication Process [soylentnews.org]
Qualcomm Invests in RISC-V Startup SiFive [soylentnews.org]
SiFive Announces a RISC-V Core With an Out-of-Order Microarchitecture [soylentnews.org]

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