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Toshiba Teasing QLC 3D NAND and TSV for More Layers
The wide adoption of 3D/vertical NAND with increased feature sizes and endurance will apparently lead to the introduction of low-cost QLC (4 bits per cell) NAND [theregister.co.uk]. 3D NAND's increased flash cell size and overprovisioning will counteract the reduction in endurance caused by moving from 3 to 4 bits per cell:
We covered the TSV notion here and now take a look at quadruple level cell (QLC) flash technology. Toshiba will present on this and TSVs in a keynote session [flashmemorysummit.com] at the August 6-9 Flash Memory Summit in Santa Clara. The session abstract notes: "New technologies such as QLC (Quadruple Level Cell) BiCS FLASH offer high density, low-cost solutions, while TSV (Through Silicon Via) NAND offers high performance with significant power reduction."
To recap, BiCS stands for Bit Cost Scalable and is Toshiba and flash foundry partner WDC's approach to 3D NAND, the layering of ordinary or planer (2D) NAND chips atop each other. We have 48-layer cells in production and 64-layer ones coming with 96-layer and even 128-layer chips in prospect. Progress beyond 64-layers has problems due to the difficulties in etching holes through the layers and so the TSV idea is to have two layers of layering: two 64-layer chips one on top of the other, with holes through them both, TSVs, for wiring to hold them together and carry out cell activity functions as well.
[...] Back in March, Jeff Ohshima, a Toshiba executive, presented on TSVs and QLC flash at the Non-Volatile Memory Workshop [ucsd.edu] and suggested 88TB QLC 3D NAND SSDs with a 500 write cycle life could be put into production. The Flash Memory Summit keynote could add more colour to this.
Related:
Toshiba and SanDisk Announce 48-Layer 256 Gb 3D NAND [soylentnews.org]
Toshiba Brings Through-Silicon Vias to NAND Flash [soylentnews.org]
Western Digital, SanDisk, and the NAND Market [soylentnews.org]
"String-Stacking" Being Developed to Enable 3D NAND With More Than 100 Layers [soylentnews.org] (NAND devices with 64 layers and above will be difficult to create, so stacking 48-layer devices will be used to increase density)
