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takyon writes:

Everspin has been selling MRAM components, but is now introducing standalone products:

Magnetoresistive RAM manufacturer Everspin has announced their first MRAM-based storage products and issued two other press releases about recent accomplishments. Until now, Everspin's business model has been to sell discrete MRAM components, but they're introducing a NVMe SSD based on their MRAM. Everspin's MRAM is one of the highest-performing and most durable non-volatile memory technologies on the market today, but its density and capacity falls far short of NAND flash, 3D XPoint, and even DRAM. As a result, use of MRAM has largely been confined to embedded systems and industrial computing that need consistent performance and high reliability, but have very modest capacity requirements. MRAM has also seen some use as a non-volatile cache or configuration memory in some storage array controllers. The new nvNITRO family of MRAM drives is intended to be used as a storage accelerator: a high-IOPS low-latency write cache or transaction log, with performance exceeding that of any single-controller drive based on NAND flash.

Everspin's current generation of spin-torque MRAM has a capacity of 256Mb per die with a DDR3 interface (albeit with very different timings from JEDEC standard for DRAM). The initial nvNITRO products will use 32 or 64 MRAM chips to offer capacities of 1GB or 2GB on a PCIe 3 x8 card. MRAM has high enough endurance that the nvNITRO does not need to perform any wear leveling, which allows for a drastically simpler controller design and means performance does not degrade over time or as the drive is filled up—the nvNITRO does not need any large spare area or overprovisioning. [...] Everspin did not have complete performance specifications available at time of writing, but the numbers they did offer are very impressive: 6µs overall latency for 4kB transfers (compared to 20µs for the Intel SSD DC P3700), and 1.5M IOPS (4kB) at QD32 (compared to 1.2M IOPS read/200k IOPS write for the HGST Ultrastar SN260).

[...] By the end of the year, Everspin will be shipping their next generation 1Gb ST-MRAM with a DDR4 interface, and the nvNITRO will use that to expand to capacities of up to 16GB in the PCIe half-height half-length card form factor, 8GB in 2.5" U.2, and at least 512MB for M.2.

Worse than NAND, 3D XPoint, and DRAM? Who is this for? If it is at a speed tier in between DRAM and XPoint, maybe the larger capacity versions can compete.

Original Submission

takyon writes:

Samsung Ships First Commercial Embedded MRAM (eMRAM) Product

Samsung today announced that it has started mass production of its first commercial embedded Magnetic Random Access Memory (eMRAM). Made using its 28FDS (28nm FD-SOI[*]) process technology, the eMRAM module promises to offer higher performance and endurance when compared to eFlash. Furthermore it can be integrated into existing chips, according to the manufacturer.

[...] MRAM is one of the highest-performing and most durable non-volatile memory technologies [that] currently exists. Because its eMRAM does not require an erase cycle before writing data, it is 1,000 times faster than eFlash, Samsung says. It also uses lower voltages when compared to eFlash, and therefore consumes around 1/400th the energy during writing process, according to the maker.

On the flip side, however, MRAM's density and capacity both fall far short of 3D XPoint, DRAM, and NAND flash, which greatly reduces its addressable markets. Samsung is not formally disclosing the capacity of its new eMRAM module; the company is only saying that it yet has to tape out a 1 Gb eMRAM chip in 2019, which strongly suggests that the current offering has a lower capacity.

[*] FD-SOI: Fully Depleted Silicon On Insulator.

Related: Everspin Announces New MRAM Products

Original Submission

takyon writes:

GlobalFoundries Teams Up with Singapore University for ReRAM Project

GlobalFoundries has announced that the company has teamed up with Singapore's Nanyang Technological University and the National Research Foundation to develop resistive random access memory (ReRAM). The next-generation memory technology could ultimately pave the way for use as a very fast non-volatile high-capacity embedded cache. The project will take four years and will cost S$120 million ($88 million).

[...] Right now, GlobalFoundries (and other contract makers of semiconductors) use eFlash (embedded flash) for chips that need relatively high-capacity onboard storage. This technology has numerous limitations, such as endurance and performance when manufactured using today's advanced logic technologies (i.e., sub-20nm nodes), which is something that is required of embedded memories. This is the main reason why GlobalFoundries and other chipmakers are looking at magneto resistive RAM (MRAM) to replace eFlash in future designs as it is considered the most durable non-volatile memory technology that exists today that can be made using contemporary logic fabrication processes.

MRAM relies on reading the magnetic anisotropy (orientation) of two ferromagnetic films separated by a thin barrier, and thus does not require an erase cycle before writing data, which makes it substantially faster than eFlash. Furthermore, its writing process requires a considerably lower amount of energy. On the flip side, MRAM's density is relatively low, its magnetic anisotropy decreases [open, DOI: 10.1038/s41598-018-32641-6] [DX] at low temperatures, which makes it a no-option for numerous applications, but which is still very promising for the majority of use cases that do not involve low temperatures.

Original Submission

takyon writes:

MRAM Tech Startup Says Its Device Solves DRAM's Row Hammer Vulnerability

Fremont, Calif.-based magnetic RAM startup, Spin Memory, says it has developed a transistor that allows MRAM and resistive RAM to be scaled down considerably. According to the company, the device could also defeat a stubborn security vulnerability in DRAM called Row Hammer.

Spin Memory calls the device the "Universal Selector." In a memory cell, the selector is the transistor used to access the memory element—a magnetic tunnel junction in MRAM, a resistive material in RRAM, and a capacitor in DRAM. These are usually built into the body of the silicon, with the memory element constructed above them. Making the selector smaller and simplifying the layout of interconnects that contact it, leads to more compact memory cells.

[...] With DRAM, the main memory of choice for computers, the Universal Selector has an interesting side-effect: it should make the memory immune to the Row Hammer. This vulnerability occurs when a row of DRAM cells is rapidly charged and discharged. (Basically, flipping the bits at an extremely high rate.) Stray charge from this action can migrate to a neighboring row of cells, corrupting the bits there. [...] According to Lewis, the new device is immune to this problem because the transistor channel is outside of the bulk of the silicon, and so it's isolated from the wandering charge. "This is a root-cause fix for row hammer," he says.

Related: The Rowhammer is Here... Next Heartbleed?
DRAM Leakage Side Effect Exploited for Privilege Escalation on Both DDR3 & DDR4
Everspin Announces New MRAM Products
Potentially Disastrous Rowhammer Bitflips Can Bypass ECC Protections
Samsung Announces Mass Production of Commercial Embedded Magnetic Random Access Memory (eMRAM)
Researchers Use Rowhammer Bit Flips to Steal 2048-bit Crypto Key
GlobalFoundries Produces Embedded Magnetoresistive Non-Volatile Memory (eMRAM) on a "22nm" Process

Original Submission