The rebirth of Japan's semiconductor industry depends on it:
A little-known Japanese company called Rapidus aims to mass produce 2nm chips just two years after the likes of Samsung, TSMC, and Intel. Many in the industry consider that an impossible task, but one of the two men leading the company believes it's just a matter of focusing on being the first to break ground on new process technology – kind of like TSMC. Rapidus also has the benefit of being at the center of Japan's strategy to conquer advanced semiconductors, meaning it will see plenty of subsidies over the coming years to fund its ambitions.
Back in 2021, the Japanese government said it would make it a top priority to reboot the local semiconductor industry, which was once a dominant force on the global market. Despite hosting more chip factories than an other country, Japan has fallen behind when it comes to mass-producing chips on advanced process nodes. To put things in perspective, Japan's share of global semiconductor sales has shrunk from 50 percent in 1988 to about 9 percent in 2022.
Meanwhile, Taiwan has become the world leader in this area, mostly thanks to TSMC. The country currently makes more than half of the world's semiconductors, and that figure is over 90 percent if you look at chips made using the most advanced process nodes. South Korea has a much smaller share of the overall market, but dominates when it comes to memory chips, thanks in no small part to companies like Samsung and SK Hynix.
That said, industry veteran Tetsuro Higashi says he's building a semiconductor company that can catch up with the likes of TSMC and Samsung in just four short years. Despite being 73 years old, Higashi is determined to show that Japan has what it takes to rejuvenate its chip industry and help it regain its edge.
It all started in August 2022 with the creation of Rapidus, a government-backed venture tasked with establishing a prototype 2nm-class process node by the end of 2025. Those ambitions became more clear in December last year, when Rapidus enlisted the help of IBM to spearhead research and development efforts. The US-based tech giant has extensive semiconductor IP and was the first company to unveil a 2nm chip design back in 2021.
Rapidus is led by two industry veterans – Tetsuro Higashi (who previously presided over Tokyo Electron) and Atsuyoshi Koike (who previously presided over Western Digital's Japanese arm). It is also backed by a several technology and financial firms such as Kioxia (formerly Toshiba Memory Corp.), Sony, Toyota Motor, Denso, NEC, NTT, Softbank, and Mitsubishi UFJ Bank.
[...] Choosing the right location for a chip factory is a difficult task. Chitose has an ample water supply and relies on renewable sources for its energy needs, which make it a good candidate. However, most of the relevant suppliers are clustered in the Kumamoto prefecture, so Rapidus will need to encourage them to have a presence in Hokkaido as well. Notably, this is where TSMC is building a chip plant as part of a joint venture with Sony.
Perhaps the biggest challenge for Rapidus will be to acquire all the necessary EUV lithography equipment from ASML. Intel, Samsung, and TSMC are also looking to secure EUV machines for their expansion plans, which is why lead times are now around two years. Luckily for Rapidus, US sanctions against Chinese semiconductor firms have blocked some orders, which may help reduce waiting times for everyone else.
(Score: 0) by Anonymous Coward on Friday May 12 2023, @08:51AM
I'm aware Taiwan is also in an earthquake zone, and that not everything else is equal. But 2nm and many earthquakes don't seem a good match.
(Score: 3, Interesting) by Username on Friday May 12 2023, @09:18AM (3 children)
Is 5 copper atoms thick, or 709,738 electrons.
(Score: 2) by takyon on Friday May 12 2023, @12:44PM
Fake nanometers. It just means that it's expected to be comparable to the industry leader TSMC's "2nm" family of nodes. Maybe it can be defined as the performance equivalent of a hypothetical planar CMOS node if it had been possible to continue scaling feature sizes down.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by Freeman on Friday May 12 2023, @02:56PM (1 child)
See, we have 3,953,690 levels of thickness to go, before Moore's Law is dead. Just have to figure out how to manufacture and compute at the electron level. Okay, sure that's not how it works, but hand wavy sufficiently magic or whatever.
Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"
(Score: 1, Interesting) by Anonymous Coward on Friday May 12 2023, @03:28PM
(Score: 3, Interesting) by quietus on Friday May 12 2023, @03:40PM
This development is in cooperation with the United States -- IBM is mentioned specifically -- and a European R&D center, IMEC [imec-int.com], in Belgium.
IMEC is historically closely associated with ASML -- they're currently working on ASML's first prototype 0.55NA EUV lithography scanner EXE:5000 [electronicsweekly.com]. Both memorandums of cooperation between IMEC and Rapidus specifically mention IMEC's 300mm pilot line: I figure this has to do with their 300mm CMOS manufacturing platform, which is used to create microLEDs for use in high-end AR glasses [optics.org]. Somebody else -- with a far more up-to-date knowledge of electronics -- who can explain the importance/link here a bit better?