Upcoming Intel processors will support scalable AVX-512 instructions, which one former Intel employee calls a "hidden gem":
Imagine if we could use vector processing on something other than just floating point problems. Today, GPUs and CPUs work tirelessly to accelerate algorithms based on floating point (FP) numbers. Algorithms can definitely benefit from basing their mathematics on bits and integers (bytes, words) if we could just accelerate them too. FPGAs can do this, but the hardware and software costs remain very high. GPUs aren't designed to operate on non-FP data. Intel AVX introduced some support, and now Intel AVX-512 is bringing a great deal of flexibility to processors. I will share why I'm convinced that the "AVX512VL" capability in particular is a hidden gem that will let AVX-512 be much more useful for compilers and developers alike.
Fortunately for software developers, Intel has done a poor job keeping the "secret" that AVX-512 is coming to Intel's recently announced Xeon Scalable processor line very soon. Amazon Web Services has publically touted AVX-512 on Skylake as coming soon!
It is timely to examine the new AVX-512 capabilities and their ability to impact beyond the more regular HPC needs for floating point only workloads. The hidden gem in all this, which enables shifting to AVX-512 more easily, is the "VL" (vector length) extensions which allow AVX-512 instructions to behave like SSE or AVX/AVX2 instructions when that suits us. This is a clever and powerful addition to enable its adoption in a wider assortment of software more quickly. The VL extensions mean that programmers (and compilers) do not need to shift immediately from 256-bits (AVX/AVX2) to 512-bits to use the new bit/byte/word manipulations. This transitional benefit is useful not only for an interim, but also for applications which find 256-bits more natural (perhaps a small, but important, subset of problems).
Will it be enough to stave off "Epyc"?
(Score: 3, Interesting) by cafebabe on Saturday July 01 2017, @04:35PM (1 child)
512 bit SIMD was devised as part of AMD's VEX prefix [wikipedia.org] which converted legacy two-address instructions into three-address instructions and also provided scalable SIMD. If Intel likes these instructions so much then perhaps they shouldn't publish one incompatible version of AMD's instruction set prior to shipping and another incompatible version after shipping. A "hidden gem"? Only if your rivals have to implement three variants of their own proposal.
1702845791×2
(Score: 2) by opinionated_science on Saturday July 01 2017, @05:08PM
interesting. I've only used the instructions on the Xeon-phi's, but I was hoping to see them on other processors - preferably a tightly integrated APU....
It would be nice to have a sub 3us 3D FFT on a desktop machine...;-)
(Score: 1, Interesting) by Anonymous Coward on Saturday July 01 2017, @08:48PM (2 children)
The thing about Intel's chips for several (tech) generations has been the inclusion of the Intel Management Engine, which works even when the system is ostensibly powered down.
With Intel, one has to decide if the new whiz-bang stuff is worth the included spyware.
Robert Pogson is currently on Beast III, his server which doubles as his main desktop machine.
He has said that Beast IV will be ARM-based. [google.com]
Anyone else thinking along these lines?
-- OriginalOwner_ [soylentnews.org]
(Score: 0) by Anonymous Coward on Saturday July 01 2017, @09:58PM (1 child)
Now in a cellphone, TV box, or AMD processor near you!
Same shit flavor as Intel ME, different shit brand!
Unless we get some ME-less processors fabbed on our own, nerds and datacenters both have lost out to the intellectually destitute commoners and their intellectual/financial/technological masters.
The hardware may be more performant, but unless you can secure it, it is detrimental to the safety of your data and your code used in the real world. And without the ability to control trust, and the execution of trusted content on your device, it is not to be trusted for anything you can't afford others to have access to.
(Score: 0) by Anonymous Coward on Tuesday July 04 2017, @03:40PM
Put down the crack pipe, dude.
(Score: 0) by Anonymous Coward on Saturday July 01 2017, @11:02PM
Any idea about how this compares to SVE from ARM? https://community.arm.com/processors/b/blog/posts/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture [arm.com]