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upstart writes:

A transistor made using two atomically thin materials sets size record:

The ever-shrinking features of transistors etched in silicon have always required pushing the cutting edge of manufacturing technology. The discovery of atomically thin materials like graphene and carbon nanotubes, however, raised the prospect of replacing our manufacturing needs with the natural properties of these materials. There's no need to etch a 1 nanometer feature into silicon if you could simply use a carbon nanotube that's 1 nanometer wide.

And there have been some notable successes, such as a 1 nanometer gate made of a single carbon nanotube. But the work often involves a difficult process of getting the atomically thin materials in the right place to create a functional device. And the rest of the hardware is typically made of bulkier materials that are borrowed from more traditional transistor design.

[...] To make the device, the researchers started with layers of silicon and silicon dioxide. The silicon was purely structural—there's no silicon in the transistor itself. A graphene sheet was layered on top of the silicon and silicon dioxide to create the gate material. On top of that, the researchers placed a layer of aluminum. While aluminum is a conductor, the researchers let it sit in the air for a few days, during which the surface oxidized to aluminum oxide. So, the bottom surface of the graphene sheet was on silicon dioxide, and the top was covered by aluminum oxide, both of which are insulators. This isolated everything but the edge of the graphene from the rest of the transistor hardware.

To expose the edge of the graphene in a useful way, the researchers simply etched along the edge of the aluminum, down into the underlying silicon dioxide. This cut through the graphene sheet, exposing a linear edge that can be used as the gate. At this point, the whole device is covered with a thin layer of hafnium oxide, an insulator that provided a bit of space between the gate and the rest of the hardware.

Next up, a flake of the molybdenum disulfide semiconductor was layered over the entire (now three-dimensional) structure. As a result of this, the edge of the graphene (now embedded in the wall of the vertical portion of the device) was in close proximity to the molybdenum disulfide. The edge of the graphene could now act as a gate to control the conductivity of the semiconductor.

Journal Reference:
Fan Wu, He Tian, Yang Shen, et al. Vertical MoS2 transistors with sub-1-nm gate lengths, Nature (DOI: 10.1038/s41586-021-04323-3)

Original Submission