from the keeping-your-electrons-correlated dept.
Arm Spinout Reveals Correlated-Electron Memory Plans
Earlier this month, a group of eight Arm Research engineers established a startup, Cerfe Labs, to commercialize an experimental memory technology they had been working on for the past five years with Austin-based Symetrix. The technology, called correlated electron RAM (CeRAM), could become a nonvolatile replacement for the fast-access embedded SRAM used in processor high-level cache memory today. Besides being able to hold data in the absence of a power supply, which SRAM cannot do, CeRAM is likely to be considerably smaller than SRAM, potentially easing IC area issues as the industry's ability to keep shrinking transistors reaches its end.
[...] The device itself is just the correlated electron material sandwiched between two electrodes, similar in structure to resistive RAM, phase change RAM, and magnetic RAM but less complex than the latter. And like those three, it is constructed in the metal interconnect layers above the silicon, requiring only one transistor in the silicon layer to access it, as opposed to SRAM's six. [Cerfe Labs' CTO Greg Yeric] says the company has made devices that fit with 7-nanometer CMOS processes and they should be scalable in both size and voltage to 5-nanometers (today's cutting edge).
But it's CeRAM's speed that could make it a good replacement for SRAM. To date, they've made CeRAM with a 2-nanosecond pulse width for writing data, which is on par with what's needed for a processor's L3 cache; Yeric says they expect this speed to improve with development.
The carbon-doped nickel oxide material also has properties that are well beyond what today's nonvolatile memory can do, but they are not as completely proven. For example, CerLab has shown that the device works at temperatures as low as 1.5 kelvins—well beyond what any nonvolatile memory can do, and in range for a role in quantum computing control circuits. In the other direction, they've demonstrated device operation up to 125 °C and showed that it retains its bits at up to 400 °C. But these figures were limited by the equipment the company had available. What's more, the device's theory of operation suggests that CeRAM should be naturally resistant to ionizing radiation and magnetic field disturbances.
(Score: 1, Funny) by Anonymous Coward on Wednesday October 21 2020, @06:09AM
And I thought "English innovation" was an oxymoron.
Limey parliament must fight tooth-and-nail to keep ARM in the limeyland.
(Score: 3, Touché) by rigrig on Wednesday October 21 2020, @09:18AM
Translation [xkcd.com]:
No one remembers the singer.
(Score: 2) by hendrikboom on Wednesday October 21 2020, @11:58AM (1 child)
So the actual bit is small.
What about the infrastructure -- the circuitry required to address that bit -- the circuitry that decodes an address to arrive at that bit? Do we still end up saving much space?
-- hendrik
(Score: 2) by takyon on Wednesday October 21 2020, @01:17PM
I don't know. What I do know is that SRAM scaling is becoming a big problem. Replacing it with something denser could lead to cheaper chips, higher core counts, etc.
TSMC "5nm", "3nm", Stacked Silicon, and More [soylentnews.org]
3D TSV SRAM is another possible solution. Or CeRAM could get 3D stacked instead.
[SIG] 10/28/2017: Soylent Upgrade v14 [soylentnews.org]
(Score: 2) by VLM on Thursday October 22 2020, @12:36PM
DoD contract incoming, assuming they were not completely funded from the start by DoD.
My reading of:
https://en.wikipedia.org/wiki/Strongly_correlated_material [wikipedia.org]
Would seem to imply their CeRAM is kinda like Ferroelectric FeRAM but with even weirder innards. What I don't see is why it would be smaller than traditional RAM or competitors. If anything it seems it should be larger? Unless they're doing exotic analog encoding and decoding, which would seem THAT part would be on average even more susceptible to radiation than trad RAM.
Most likely, the device will store data better under ionizing radiation, but actual use during radiation would be even worse than existing ram technologies. So that has weird DoD applications. Like it wouldn't be useful for inertial nav systems for ICBMs, but maybe it would make a great data logger for nuke testing, well, at least until the first radiation burst hits.