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posted by martyb on Tuesday March 19 2019, @12:51AM   Printer-friendly
from the top-that! dept.

Ryzen Up: AMD to 3D Stack DRAM and SRAM on Processors

AMD revealed at a recent high performance computing event that it is working on new designs that use 3D-stacked DRAM and SRAM on top of its processors to improve performance.

[...] Intel whipped the covers off its Foveros 3D chip stacking technology during its recent Architecture Day event and revealed it already has a leading-edge product ready to enter production. The package consists of a 10nm CPU and an I/O chip mated with TSVs (Through Silicon Via) that connect the die through vertical electrical connections in the center of the die. Intel also added a memory chip to the top of the stack using a conventional PoP (Package on Package) implementation.

Not to be left behind, AMD is also turning its eyes toward 3D chip stacking techniques, albeit from a slightly different angle. AMD SVP and GM Forrest Norrod recently presented at the Rice Oil and Gas HPC conference and revealed that the company has its own 3D stacking intiative underway.

[...] [True] 3D stacking consists of two die (in this case, memory and a processor) placed on top of each other and connected through vertical TSV connections that mate the die directly together. These TSV connections, which transfer data between the two die at the fastest speeds possible, typically reside in the center of the die. That direct mating increases performance and reduces power consumption (all data movement requires power, but direct connections streamline the process). 3D stacking also affords density advantages.

Where are the CPUs with attached High Bandwidth Memory?

Related: Intel Announces "Sunny Cove", Gen11 Graphics, Discrete Graphics Brand Name, 3D Packaging, and More
Intel Details Lakefield CPU SoC With 3D Packaging and Big/Small Core Configuration


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  • (Score: 0) by Anonymous Coward on Tuesday March 19 2019, @05:59AM (1 child)

    by Anonymous Coward on Tuesday March 19 2019, @05:59AM (#816825)

    I wonder under what conditions it would be better to use 4-8GB of this faster RAM (1TB/s) backed by 16-32 GBs of normal RAM used for ZRAM (compressed swap that keeps things in RAM before disk, if at all), instead of real 32-48GB of current RAM. Like another level of cache, but completly handled by OS; or maybe as L4, but I doubt that, I think everyone stopped at L3 due complexity. Workloads (desktop? server? rendering?), ratios (1:4? 1:8? 1:16?...), etc. Maybe the chips could include some (de)compression accelerators (or special instructions in the normal cores) too.

  • (Score: 2) by Freeman on Tuesday March 19 2019, @03:47PM

    by Freeman (732) on Tuesday March 19 2019, @03:47PM (#816985) Journal

    Some games are pushing the 4-8GB RAM usage by themselves, let alone people that use their machines for video / photo editing. You don't want to need to use compressed anything at that point. My current instance of Firefox is using 800MB+ and I noticed my wife's computer was using 1.5GB+ just for Firefox. Due to lots and lots of tabs, and in her case, tabs with video and lots of photos.

    From what they're describing, I could envision a horror story involving even more variations of the same processor to wade through.

    --
    Joshua 1:9 "Be strong and of a good courage; be not afraid, neither be thou dismayed: for the Lord thy God is with thee"