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Wait, What? MIPS Becomes RISC-V

Accepted submission by DannyB at 2021-03-08 22:40:29 from the reduced-destruction-set-computing dept.
Hardware

Wait, What? MIPS Becomes RISC-V [eejournal.com]
Classic CPU Company Exits Bankruptcy, Throws in the Towel

What a long, strange trip it’s been. MIPS Technologies no longer designs MIPS processors. Instead, it’s joined the RISC-V camp, abandoning its eponymous architecture for one that has strong historical and technical ties. The move apparently heralds the end of the road for MIPS as a CPU family, and a further (slight) diminution in the variety of processors available. It’s the final arc of an architecture.

Development of the MIPS processor architecture has now stopped, and MIPS (the company) will start making chips based on RISC-V. This is a complete change of business model, not just CPU. The old MIPS was in the business of licensing IP, just like ARM [arm.com] or Ceva [ceva-dsp.com] or Rambus. [rambus.com] It didn’t make anything tangible. Companies like the old Wave Computing were its customers, and processors like ARM and RISC-V were its competitors. Now that equation is inverted.

The company didn’t have far to go to find a new CPU. RISC-V is the brainchild of Dave Patterson and his team at UC Berkeley, and he’s co-author of the seminal textbook on CPU design along with John Hennessy at Stanford. Hennessy’s MIPS (Microprocessor without Interlocked Pipeline Stages) preceded RISC-V by about two decades, but the two are remarkably similar in underlying concept and philosophy.

  “MIPS is developing a new industry leading, standards-based, 8th-generation architecture, which will be based on the open-source RISC-V processor standard.” In this context, the “8th generation” refers to seven generations of the traditional MIPS architecture, followed by an upcoming RISC-V design. It sounds like the company is implying that this is a smooth transition with some level of compatibility between the old and the new. It isn’t. It’s a clean break as the company switches from the old CPU design, that it owned, to a new one that’s in the public domain. The new MIPS is MIPS in name only.

The new MIPS is also a member of RISC-V International, [riscv.org] the nonprofit group that coordinates official RISC-V oversight. In fact, it’s been a member for a while, which might have telegraphed their intentions. It so happens that the CTO of RISC-V International, Mark Himelstein, is a former employee of MIPS Technologies. He told me, “I would personally say that the simplicity and elegance of RISC-V most reminds me of MIPS more than any other architecture. I am excited about the company’s next steps, including their involvement with the community and to see what RISC-V products they will bring to market.”

Could it be a good thing to have more and more companies cooperating on interface (eg, instruction set) but competing on implementation (silicon)?


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