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TSMC and Partners Develop Key Feature for "1nm" Process Technology

Accepted submission by takyon at 2021-05-21 07:11:17
Science

TSMC and Partners Develop Key Feature for Sub 1nm Process Technology [tomshardware.com]

According to a publication by TSMC, NTU, and MIT in Nature [nature.com] [DOI: 10.1038/s41586-021-03472-9] [DX [doi.org]] (noticed by Verdict [verdict.co.uk]), Taiwan Semiconductor Manufacturing Co. (TSMC) and its research partners from the National University of Taiwan (NTU) and Massachusetts Institute of Technology (MIT) have said that they have developed material that will be used for transistor contact electrodes with an upcoming 1nm fabrication process.

[...] The publication indicates that usage of semi-metal bismuth (Bi) as the transistor's contact electrode can greatly reduce the resistance and increase the current. TSMC currently uses tungsten interconnects (made using selective tungsten deposition process), whereas Intel uses cobalt interconnects. Both have their advantages and both require specific factory tools.

In a bid to use semi-metal bismuth (Bi) as transistor's contact electrode, researchers had to use a helium ion beam (HIB) lithography system and design an 'easy deposition process.' This 'process' was only used on an R&D production line, so it is not quite ready for mass production.


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