Slash Boxes

SoylentNews is people

posted by cmn32480 on Tuesday April 05 2016, @06:06PM   Printer-friendly
from the everything-is-getting-smaller dept.

Samsung Electronics has announced the production of "10nm-class" 8 gigabit DRAM chips that will be used in DDR4 modules with capacities ranging from 4 GB to 128 GB. "10nm-class" is an industry term that refers to an unspecified process somewhere between 10 nanometers and 19 nanometers.

In November, Samsung announced the production of 128 GB DDR4 registered dual inline memory modules (RDIMMs) using through silicon via (TSV) stacked dies with four 8 gigabit chips per package. Those modules used 20nm process DRAM and achieved a 2,400 Mbps data rate. The new 10nm-class memory will support a 3,200 Mbps data rate.

Original Submission

This discussion has been archived. No new comments can be posted.
Display Options Threshold/Breakthrough Mark All as Read Mark All as Unread
The Fine Print: The following comments are owned by whoever posted them. We are not responsible for them in any way.
  • (Score: 2) by Gravis on Tuesday April 05 2016, @07:06PM

    by Gravis (4596) on Tuesday April 05 2016, @07:06PM (#327755)

    the 14nm process [] is the only thing below 22nm that is in use. the actual 10nm process is still in development.

    Starting Score:    1  point
    Karma-Bonus Modifier   +1  

    Total Score:   2  
  • (Score: 4, Informative) by takyon on Tuesday April 05 2016, @07:22PM

    by takyon (881) <> on Tuesday April 05 2016, @07:22PM (#327761) Journal

    Memory manufacturers use irregular processes, such as 15nm or 19nm mentioned in this story [], or 16nm-17nm here []. So no, it is not necessarily 14nm.

    For CPUs, there are other processes under 22nm... mainly 20nm and 16nm. 14nm is not the "only thing".

    [SIG] 10/28/2017: Soylent Upgrade v14 []
    • (Score: 2) by bob_super on Tuesday April 05 2016, @09:08PM

      by bob_super (1357) on Tuesday April 05 2016, @09:08PM (#327785)

      and there is no real "14nm" dimension in that process either.
      Processes are named by marketing by dividing the old node by sqrt(2), but when you look at the exact feature sizes, it's a mixed bag, with some not even changing from one node to the next.

      • (Score: 2) by takyon on Tuesday April 05 2016, @09:49PM

        by takyon (881) <> on Tuesday April 05 2016, @09:49PM (#327799) Journal

        Yeah, I read that article too (although I can't find it, was it IEEE?). The proof is in the pudding. Some feature sizes scale down, density and performance scale up, power consumption drops. We can be fairly certain that "10nm-class" DRAM will outperform "20nm" DRAM, and if it doesn't, benchmarks and other data will tell the tale.

        [SIG] 10/28/2017: Soylent Upgrade v14 []