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posted by on Wednesday January 11 2017, @09:26PM   Printer-friendly
from the who's-a-cute-li'l-transistor? dept.


Qualcomm previously revealed the name of its new high-end SoC, but today at CES 2017 it discussed the Snapdragon 835 in greater detail. Replacing the Snapdragon 820/821 as the pinnacle processor in its lineup, the 835 is the first commercial SoC to use Samsung's 10nm "10LPE" FinFET manufacturing node. Qualcomm did not disclose die size, but it said the overall package size is 35% smaller than the Snapdragon 820 and contains more than 3 billion transistors. Samsung says its third-generation FinFET node "allows up to a 30% increase in area efficiency with 27% higher performance or up to 40% lower power consumption" relative to its first-generation 14nm 14LPE node at the same frequency, so Snapdragon 835's process advantage over the 820, which uses Samsung's second-generation 14LPP node, will be a bit less.

[...] Qualcomm finds itself in a much different position today compared to one year ago when it launched the Snapdragon 820. Back then, it was on the hot seat after its previous flagship products, the Snapdragon 808 and 810, failed to meet expectations. Qualcomm's implementation of ARM's Cortex-A57 CPU core and TSMC's last 20nm planar process were not a good combination, resulting in a generation of flagship phones that struggled to meet or exceed the performance of older models and exhibited higher than normal skin temperatures. The success of Snapdragon 820 would be crucial to regaining its partner's trust and restoring its image with consumers. The 820 was pivotal for another reason too: It introduced Qualcomm's first custom 64-bit CPU core, Kryo. Creating a custom CPU (or GPU/DSP/ISP) is one way for SoC vendors to differentiate their products and establish themselves as innovators. Snapdragon 810's use of stock ARM cores could be construed as a step backwards then after previous Snapdragon SoCs used Qualcomm's custom Krait CPUs. Apple's prior introduction of a custom 64-bit CPU, which caught everyone by surprise, only added fuel to the fire.

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  • (Score: 5, Informative) by TheRaven on Thursday January 12 2017, @11:25AM

    by TheRaven (270) on Thursday January 12 2017, @11:25AM (#452911) Journal

    Speaking as someone whose name you'll find in the acknowledgements of the RISC-V spec:

    RISC-V is a pretty good mid '90s ISA. ARMv8 is a good late '00s ISA. The lack of any kind of predication in RISC-V (not even a conditional move) simplifies the register forwarding but means that you either need complex microcode to spot short jumps with moves in the middle and turn them into conditional moves, or you need a lot more branch predictor state. Krste's argument for this is that it simplifies small implementations, but I had a student try adding a conditional move to RISC-V for a simple in-order pipeline and he found that you got less than 1% are increase from supporting it and needed 4 times the branch predictor state to achieve comparable performance without it (that wasn't a new result, by the way - it's the normal heuristic for conditional moves). Similarly, the relative lack of complex addressing modes in RISC-V vs ARM means that a lot of common operations require more instructions on RISC-V than ARM. The decision not to make the i-cache coherent with the d-cache means that, in a multicore system, any JIT compiler needs to call into the kernel, send IPIs, and do explicit invalidations, whereas the same effect is achieved almost for free via the cache coherency protocol on ARM (or x86). SPARC made this mistake too, but Java performance sucked so much on SPARC as a result that Sun fixed it in later revisions.

    Qualcomm's interest in RISC-V is primarily for a bunch of simple controllers on other things. A typical Qualcomm SoC contains a few dozen ARM cores, mostly M-class cores that are controlling other specialised cores. Replacing these with low-end RISC-V cores wouldn't make a difference to performance (even if they're slower - nothing these things do is stressing a low-end ARM core) and would reduce their per-SoC royalties by 10-20ยข. Micron is interested in RISC-V for a similar reason: every SSD controller board they ship has 7 ARM cores and in a market where the profit margin is a few dollars the royalty payments for these eat a lot of their profit.

    That's not to say that ARM should be complacent. The computing industry is full of the corpses companies that ignored a competitor that was only eating the low end of their business. Anyone remember SGI refusing to make a commodity GPU that would fit in a PC for fear of cannibalising their graphical workstation sales, only to have nVidia do it anyway?

    sudo mod me up
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