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takyon [soylentnews.org] writes:

Startup Unisantis Proposes DRAM Alternative [eetimes.com]

Singapore-based DRAM specialist Unisantis Electronics revealed at this week's (virtual) IEEE International Memory Workshop (IMW) advances in its work on dynamic flash memory (DFM) that it claims is a faster and denser technology than DRAM or other types of volatile memory.

[...] DFM is also a type of volatile memory, but since it does not rely on capacitors it has fewer leak paths, it has no connection between switching transistors and a capacitor. The result is a cell design with the potential for significant increases in transistor density and —because it not only offers block refresh, but as a Flash memory it offers block erase — DFM reduces the frequency and the overhead of the refresh cycle and is capable of delivering significant improvements in speed and power compared to DRAM.

Using TCAD simulation, researchers at Unisantis have proven that DFM has a substantial potential to increase density 4X compared to DRAM. The scaling of DRAM has almost stopped at 16Gb, according to recent IEEE ISSCC (International Solid-State Circuits Conference) papers.

Using a PCIe Slot to Install DRAM: New Samsung CXL.mem Expansion Module [anandtech.com]

In the computing industry, we've lived with PCIe as a standard for a long time. It is used to add any additional features to a system: graphics, storage, USB ports, more storage, networking, add-in cards, storage, sound cards, Wi-Fi, oh did I mention storage? Well the one thing that we haven't been able to put into a PCIe slot is DRAM – I don't mean DRAM as a storage device, but memory that actually is added to the system as useable DRAM. Back in 2019 a new CXL standard was introduced, which uses a PCIe 5.0 link as the physical interface. Part of that standard is CXL.memory – the ability to add DRAM into a system through a CXL/PCIe slot. Today Samsung is unveiling the first DRAM module specifically designed in this way.

[...] Samsung's unveiling today is of a CXL-attached module packed to the max with DDR5. It uses a full PCIe 5.0 x16 link, allowing for a theoretical bidirectional 32 GT/s, but with multiple TB of memory behind a buffer controller. In much the same way that companies like Samsung pack NAND into a U.2-sized form factor, with sufficient cooling, Samsung does the same here but with DRAM.

Related: Compute Express Link Specification (CXL) Version 1.0 Launched [soylentnews.org]

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