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takyon [soylentnews.org] writes:

TSMC Has Started The Development of The 2nm Lithography Process [wccftech.com]

Earlier this month, we saw that TSMC was getting its CoWoS interposer [wccftech.com] and 5nm production lines at full capacity [wccftech.com]. Yesterday, we found out that AMD and Nvidia bought up all of their excess capacity [wccftech.com] for next-generation GPU and CPU development. They have also been making advancements in 3nm process development, but have not been able to put much work in because many of the tools necessary are currently unavailable or hard to find due to the COVID-19 pandemic. 3nm is already a lot of work as it is, but in a recent shareholders meeting, DigiTimes [digitimes.com] was able to figure out that TSMC is already planning to start the development of the 2nm Lithographic process.

TSMC's "3nm" node has reportedly been delayed by 6 months [wccftech.com] due to the pandemic. Samsung is facing similar delays [tomshardware.com] on their own "3nm" node.

TSMC's "5nm" production has not been delayed, and AMD will reportedly use an exclusive enhanced "5nm" node [notebookcheck.net] for Zen 4 CPUs in 2021.

Previously: TSMC's Chip-on-Wafer-on-Substrate (CoWoS) Connects Multiple Interposers [soylentnews.org]
High Demand Reported for TSMC's Chip-on-Wafer-on-Substrate Packaging [soylentnews.org]

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