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Samsung has added a so-called "4nm" process to its roadmap:
At the annual Samsung Foundry Forum, Samsung announced its foundry's roadmap for the next few years, which includes an 18nm FD-SOI [(Fully Depleted – Silicon on Insulator)] generation targeting low-cost IoT chips as well as 8nm, 7nm, 6nm, 5nm, and even 4nm process generations.
[...] 7LPP (7nm Low Power Plus): 7LPP will be the first semiconductor process technology to use an EUV lithography solution. 250W of maximum EUV source power, which is the most important milestone for EUV insertion into high volume production, was developed by the collaborative efforts of Samsung and ASML. EUV lithography deployment will break the barriers of Moore's law scaling, paving the way for single nanometer semiconductor technology generations.
[...] The 4LPP process generation will be Samsung's first to use a "Gate All Around FET" (GAAFET) transistor structure, with Samsung's own implementation dubbed "Multi Bridge Channel FET" (MBCFET). The technology uses a "Nanosheet" device to overcome the physical limitations of the FinFET architecture.
But how many transistors per square millimeter is it?
(Score: 2) by kaszz on Sunday June 04 2017, @12:50PM (2 children)
Intel has been beaten?
Samsung made AMD-x86 or ARM.. in 4 nm. Maybe that would be something?
(Score: 2) by mth on Sunday June 04 2017, @01:47PM (1 child)
Samsung already makes ARM SoCs: Exynos [wikipedia.org]. They're not a threat to Intel in terms of absolute performance, but when it comes to power efficiency ARM chips have been ahead of Intel for a long time.
(Score: 2) by kaszz on Sunday June 04 2017, @02:09PM
My point is that with processor manufactured in a 4 nm process those might perhaps beat Intel in speed and power efficiency?
That the ARM architecture is more efficient than Intel is of course not news.
(Score: 0) by Anonymous Coward on Sunday June 04 2017, @02:05PM (1 child)
> 250W of maximum EUV source power
According to https://en.wikipedia.org/wiki/Extreme_ultraviolet_lithography [wikipedia.org] , making extreme UV is extremely inefficient --
> Xe or Sn plasma sources are either discharge-produced or laser-produced. Discharge-produced plasma is made by discharging a lightning bolt's worth of electric current through a tin vapor. Laser-produced plasma is made by microscopic droplets of molten tin heated by powerful laser. Laser-produced plasma sources (e.g., ASML's NXE:3300B scanner) outperform discharge-produced plasma sources. Power output exceeding 250 W is a requirement for sufficient throughput.
>
> While state-of-the-art 193 nm ArF excimer lasers offer intensities of 200 W/cm2,[32] lasers for producing EUV-generating plasmas need to be much more intense, on the order of 1011 W/cm2.[33] This indicates the enormous energy burden imposed by switching from 193 nm light (power output approaching 100 W)[34] to EUV light (10 kW).[35] An EUV source driven by a 200 kW CO2 laser with ~10% wall plug efficiency[36] consumes an electrical power of ~2 MW, while a 100 W ArF immersion laser with ~1% wall plug efficiency[37] consumes an electrical power of ~10 kW. A state-of-the-art ArF immersion lithography 120 W light source requires no more than 40 kW[38] while EUV sources are targeted to exceed 40 kW.[39]
(Score: 0) by Anonymous Coward on Sunday June 04 2017, @11:07PM
So, will the power saving from smaller chip features exceed the extreme amount of power used by EUV during manufacture? I don't know enough to do the envelope calculation, anyone have a clue? 2MW is a lot of power, and a wafer goes through weeks of process steps.
Car analogy -- Like payback on a Prius, eventually the extra first cost is recouped in fuel savings, as long as you drive enough miles and the price of gasoline is high enough.
(Score: 2) by FatPhil on Sunday June 04 2017, @07:02PM (6 children)
Moore's law, when used as a predictive statement, indicates that the number of transistors that will fit on a die will grow exponentially. It has therefore been used to predict that there will be *no barriers*. (Not that it was intended to be a long-term predictive statement, and the teenies and twenties can definitely be considered the distant future of when it was made.)
Great minds discuss ideas; average minds discuss events; small minds discuss people; the smallest discuss themselves
(Score: -1, Flamebait) by Anonymous Coward on Sunday June 04 2017, @08:01PM
Seriously, just fuck off.
(Score: 2) by takyon on Sunday June 04 2017, @08:12PM (2 children)
Nitpick-tier complaint.
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(Score: 3, Interesting) by FatPhil on Sunday June 04 2017, @08:27PM (1 child)
Great minds discuss ideas; average minds discuss events; small minds discuss people; the smallest discuss themselves
(Score: 3, Informative) by takyon on Sunday June 04 2017, @08:48PM
There have always been barriers to further scaling. Whether they can be overcome or not, or overcome economically, are other concerns.
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(Score: 2) by martyb on Monday June 05 2017, @07:08AM (1 child)
Close, but not quite. This is a commonly-repeated but misunderstood aspect of Moore's Law. It was not just about exponential growth. Gordon Moore made a prediction regarding the number of transistors that could be produced at minimum cost.
Refer to "PROCEEDINGS OF THE IEEE, VOL. 86, NO. 1, JANUARY 1998 [utexas.edu] (pdf)" which, in turn, stated: "Reprinted from Gordon E. Moore, "Cramming More Components onto Integrated Circuits," Electronics, pp. 114117, April 19, 1965. Publisher Item Identifier S 0018-9219(98)00753-1."
An excerpt follows, with my emphasis added:
The graph herein referenced is presented as "Figure 3" and includes the famous mapping of "Log2 of the number of components per integrated function" (y-axis) versus "date" (x-axis) and which depicts the oft-repeated "doubling of transistors per year". Having already stated in the text his qualification that these would be produced at minimum cost, and given that the text label on the y-axis already encompassed three physical lines in the graph, it is understandable that he did not also include the qualification "at minimum cost" in that label. It seems to me that some people glanced at the plot, saw the pattern, and neglected to read the text. They widely proclaimed their viewpoint (neglecting minimum cost) and eventually that is what people remember, instead of what Gordon Moore actually stated.
The amazing thing, from my perspective, was that "law" was postulated in 1965 which is over FIFTY YEARS AGO! There were no cell phones, laptops, or even personal computers back then. We're talking computers that were minimally the size of refrigerators. Now think of the rate of change in electronics we've witnessed since then. That his "law" (more correctly "observation" -- but that takes too many syllables) has held true for such a long period of time utterly amazes me. Moore made an extrapolation based on a few years' worth of results, when we were basically just getting started with integrated circuits, and it has basically held true for decades!
Now, back to THIS story, my take is based on two things. For better or worse, Samsung is based out of South Korea. I took this phrasing as simply being as an error of translation of an abstract concept. I understood it to mean: "we were approaching roadblocks which blocked our constructing smaller and smaller features.
Visible light has a wavelength on the order of 500nm. Through tremendous feats of engineering, we've witnessed smaller and smaller features continue to roll out. As we step away from visible light into ultra-violet, it is possible to construct finer and finer features. But there are limits with what can be done. Creating those precise frequencies at sufficient power levels to use in photo-lithography was starting to look like a hard barrier. Many were pursuing different approaches that worked in theory, but putting that into practice continued to run into roadblocks. Maybe we HAD reached the end of Moore's Law?
This press release is simply stating that they have found a way to overcome that limitation, that they have a means of using extreme ultra-violet, and that they plan to use that to develop "7nm" feature sizes. (I'll not get into the whole discussion as to what is actually measured when one speaks about, say a 10nm process step or feature size.)
So, I'll grant you that it is not the clearest phrasing, but a little tolerance of a mis-translation to English explains it well enough for me.
Wit is intellect, dancing.
(Score: 2) by FatPhil on Monday June 05 2017, @10:37AM
Because Samsung are a small cash-strapped company who can't afford a proof-reader who is familiar with technology, yeah, right.
I shouldn't be surprised, even the contract I signed with SR-UK (Samsung Research UK) was in pretty mangled English.
Even Moore's English is a bit mangled, I'm sure he's talking about minimum cost per unit of functionality, which isn't the absolute minimum cost. MCUs are typically built on what might be considered very legacy processes (I guess 60-90, but I'm a bit out of touch), but they're not designed to have much functionality at all. Smaller than the smallest package size simply isn't worth it.
Great minds discuss ideas; average minds discuss events; small minds discuss people; the smallest discuss themselves