Western Digital's Low Latency Flash: A Competitor to Intel's Optane (3D XPoint)?

SanDisk and HP Announce Potential Competitor to XPoint Memory 5 comments

HP and SanDisk have announced the development of Storage-Class Memory, a technology with attributes similar to Intel and Micron's 3D XPoint ("crosspoint") memory:

HP and SanDisk are joining forces to combat the Intel/Micron 3D XPoint memory threat, and developing their own Storage-Class Memory (SCM) technology.
SCM is persistent memory that runs at DRAM or near-DRAM speed but is less costly, enabling in-memory computing without any overhead of writing to slower persistent data storage such as flash or disk through a CPU cycle-gobbling IO stack. It requires both hardware and software developments. Micron and Intel's XPoint memory is claimed to be 1,000 times faster than flash with up to 1,000 times flash's endurance. Oddly enough HP and SanDisk say their SCM technology is also "expected to be up to 1,000 times faster than flash storage and offer up to 1,000 times more endurance than flash storage."
[...] The partnership's aim is to create enterprise-class products for Memory-driven Computing and also to build better data centre SSDs. The Storage-Class Memory deal is more long-term: "Our partnership to collaborate on new SCM technology solutions is expected to revolutionise computing in the years ahead."
[...] It's not yet known what the XPoint cell process is, beyond being told it's a bulk change to the material but not a phase-change. Analyst Jim Handy has written an XPoint report which said HP had abandoned its Memristor technology. This SanDisk partnership implies that this point is incorrect.
The HP/SanDisk duo also intend to contribute to HP's Machine concept, "which reinvents the fundamental architecture of computers to enable a quantum leap in performance and efficiency, while lowering costs and improving security."

As we previously reported, Intel and Micron plan to release SSD and DIMM XPoint-based products in 2016, with Intel marketing them under the brand name "Optane".

Is HP's memristor partnership with Hynix obsolete? Will HP Enterprise finally give birth to "The Machine" and change supercomputing? Will Crossbar's ReRAM wither and die, or will the company join the fray and compete to produce the ultimate post-NAND memory?

Original Submission

IBM Demonstrates Phase Change Memory with Multiple Bits Per Cell 6 comments

takyon writes:

IBM researchers have created and tested phase change memory (PCM) that can store two bits per cell, and say that they see a path to three bits per cell, allowing for memory with a similar density to TLC NAND. IBM Research may be positioning PCM as a viable alternative to Intel and Micron's 3D XPoint, another "post-NAND" technology with DRAM-like speeds and write endurance, and NAND-like persistence, cost, and storage density:

"Phase change memory is the first instantiation of a universal memory with properties of both DRAM and flash, thus answering one of the grand challenges of our industry," Pozidis said with regard to the research that IBM has been doing. "Reaching three bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash."
This is, of course, precisely the part of the memory hierarchy that Intel and Micron are pursuing with their 3D XPoint memory, which many speculate is based on resistive RAM (ReRAM) technologies, not PCM. At this time, 3D XPoint is implemented using a 20 nanometer process and stores data at a density of one bit per cell (SLC) and a 7 microsecond latency for reads and delivers on the order of 78,500 IOPS in a 70/30 read/write mix that is typically used to characterize storage. (These stats are courtesy of Chris Mellor over at our sister publication, The Register .) DRAM access is on the order of 200 nanoseconds, or about 35X faster than Intel's Optane 3D XPoint, but 3D XPoint is about four times faster on writes than a PCI-Express flash unit using the trimmed down NVM-Express protocol and about twelve times faster than this flash on reads.

Also at Tom's Hardware.

Multilevel-Cell Phase-Change Memory: A Viable Technology (DOI: 10.1109/JETCAS.2016.2528598)

Original Submission

Western Digital and Samsung at the Flash Memory Summit 11 comments

takyon writes:

Western Digital has announced its intention to include 3D Resistive RAM (ReRAM) as storage class memory (SCM) in future SSDs and other products:

Without making any significant announcements this week, Western Digital indicated that it would use some of the things it has learnt while developing its BiCS 3D NAND to produce its ReRAM chips. The company claims that its ReRAM will feature a multi-layer cross-point implementation, something it originally revealed a while ago.
Perhaps, the most important announcement regarding the 3D ReRAM by Western Digital is the claim about scale and capital efficiency of the new memory. Essentially, this could mean that the company plans to use its manufacturing capacities as well as its infrastructure (testing, packaging, etc.) in Yokkaichi, Japan, to make 3D ReRAM. Remember that SCM is at this point more expensive than NAND, hence, it makes sense to continue using the current fabs and equipment to build both types of non-volatile memory so ensure that the SCM part of the business remains profitable.

One of WD's slides projects SCM as 50% the cost per gigabyte of DRAM in 2017, declining to 5% by 2023.

Samsung introduced its fourth generation of vertical NAND, with 64 layers:

With a per-die capacity of 512Gb (64GB), Samsung can now put 1TB of TLC flash in a single package. This means most product lines will be seeing an increase in capacity at the high end of the range. Their BGA SSD products will be offering 1TB capacity even in the 11.5mm by 13mm form factor. The 16TB PM1633a SAS SSD will be eclipsed by the new 32TB PM1643. Likely to be further out, the PM1725 PCIe add-in card SSD will be succeeded by the PM1735 with a PCIe 4 x8 host interface.
Complementing the NAND update will be a new non-standard oversized M.2 form factor 32mm wide and 114mm long, compared to the typical enterprise M.2 size of 22mm by 110mm. A little extra room can go a long way, and Samsung will be using it to produce 8TB drives. These will be enterprise SSDs and Samsung showed a diagram of these enabling 256TB of flash in a 1U server. Samsung will also be producing 4TB drives in standard M.2 sizing.
In what is likely a bid to steal some thunder from 3D XPoint memory before it can ship, Samsung announced Z-NAND memory technology and a Z-SSD product based around Z-NAND and a new SSD controller. They said nothing about the operating principles of Z-NAND, but they did talk about their plans for the Z-SSD products.

Original Submission

Fujitsu to Mass Produce Nantero-Licensed NRAM in 2018 25 comments

takyon writes:

A nanotube-based non-volatile RAM product could give Intel/Micron's 3D XPoint some competition:

Fujitsu announced that it has licensed Nantero's carbon nanotube-based NRAM (Non-volatile RAM) and will participate in a joint development effort to bring a 256Gb 55nm product to market in 2018. Carbon nanotubes are a promising technology projected to make an appearance in numerous applications, largely due to their incredible characteristics, which include unmatchable performance, durability and extreme temperature tolerance. Most view carbon nanotubes as a technology far off on the horizon, but Nantero has had working prototypes for several years.
[...] Other products also suffer limited endurance thresholds, whereas Nantero's NRAM has been tested up to 10^12 (1 trillion) cycles. The company stopped testing endurance at that point, so the upper bounds remain undefined. [...] The NRAM carbon nanotubes are 2nm in diameter. Much like NAND, fabs arrange the material into separate cells. NAND employs electrons to denote the binary value held in each cell (1 or 0), and the smallest lithographies hold roughly a dozen electrons per cell. NRAM employs several hundred carbon nanotubes per cell, and the tubes either attract or repel each other with the application of an electrical current, which signifies an "on" or "off" state. NRAM erases (resets) the cells with a phonon-driven technique that forces the nanotubes to vibrate and separate from each other. NRAM triggers the reset process by reversing the current, and it is reportedly more power efficient than competing memories (particularly at idle, where it requires no power at all).

NRAM could be much faster than 3D XPoint and suitable as universal memory for a concept like HP's "The Machine":

NRAM seems to be far faster than XPoint, and could be denser. An Intel Optane DIMM might have a latency of [7-9 µs] (7,000-9,000ns). Micron QuantX XPoint SSDs are expected to have latencies of [10 µs] for reading and [20 µs] for writing; that's 10,000 and 20,000ns respectively. A quick comparison has NRAM at c50ns or less and XPoint DIMMs at 7,000-10,000ns, 140-200 times slower. We might imagine that an XPoint/ReRAM-using server system has both DRAM and XPoint/ReRAM whereas an NRAM-using system might just use NRAM, once pricing facilitates this.

Another company licensing with Nantero is already looking to scale the NRAM down to 28nm.

Original Submission

Rambus and Gigadrive Form Joint Venture to Commercialize Resistive RAM 6 comments

takyon writes:

Rambus, GigaDevice form ReRAM joint venture

Reliance Memory has been formed in Beijing, China to commercialize Resistive Random Access Memory (ReRAM) technology. The company is a joint venture between intellectual property developer Rambus Inc. (Sunnyvale, Calif.), fabless chip company GigaDevice Semiconductor (Beijing) Inc. and multiple venture capital companies. VC companies include THG Ventures, West Summit Capital, Walden International and Zhisland Capital.
The value of the investment was not disclosed but the company is expected to make ReRAM for use in embedded and IoT applications. GigaDevice is a fabless chip company that uses foundries to manufacture non-volatile memory and 32bit microcontrollers.
The Rambus ReRAM technology, previously known as CMOx has a heritage that goes back to Rambus's acquisition of Unity Semiconductor Corp. for $35 million in February 2012. Unity has been working on the technology for a decade, but failed to bring the technology to market. Unity had claimed to have developed a passive rewritable cross-point memory array based on conductive metal oxide. This would provide similarities to filament-based metal migration technologies such as those developed by Adesto Technologies Corp. and Crossbar Inc.

Resistive random-access memory. Yes, that Rambus.

Original Submission

Samsung Shares Plans for 96-Layer TLC NAND, QLC NAND, and 2nd-Generation "Z-NAND" 4 comments

takyon writes:

Samsung Shares SSD Roadmap for QLC NAND And 96-layer 3D NAND

At Samsung's Tech Day event today in San Jose, the company shared their SSD roadmap for transitioning to 96-layer 3D NAND and introducing four bit per cell (QLC) NAND flash memory. Successors have been named for most of their current SSDs that use three bit per cell (TLC) NAND flash and are being updated with 96-layer 3D TLC, and new product lines using QLC NAND have been introduced.
[...] The enterprise SAS product line is not seeing any major changes to performance or available capacities, but the update from the PM1643 to the PM1643a does improve random write performance by about 20%. The largest model remains 30.72TB. The high-end enterprise NVMe drives are getting a major controller update that brings PCIe 4.0 support in addition to the NAND upgrade. This allows for much higher performance across the board, most notably with sequential read speeds reaching 8GB/s on the new PM1733 compared to 3.5GB/s on the PM1723b. The maximum available capacity has caught up to the SAS product line with the introduction of a 30.72TB model.
[...] Samsung also mentioned that in Q2 2019 they are planning to introduce a higher-performing 512Gb QLC die to complement their current 1Tb die. Samsung compared the performance of this new 512Gb die against an unspecified competitor's 1Tb QLC, claiming that Samsung's high-performance QLC will have 37% lower read latency and 45% lower program latency.
[...] The first products featuring the second generation of Samsung's low-latency Z-NAND flash memory will be the SZ1733 and SZ1735, high-end enterprise NVMe SSDs that differ primarily in the amount of overprovisioning. Samsung has announced that their second generation of Z-NAND will include a MLC version, but these drives are using the SLC version. Like the TLC-based PM1733, the new Z-NAND SSDs will also feature dual-port capability and PCIe 4.0 support. Sequential reads of up to 12GB/s are claimed, but this product line is all about random I/O, which Samsung hasn't detailed yet. Samsung demoed a 4TB model, significantly larger than the 800GB maximum for the first-generation SZ985.

Z-NAND (PDF) has lower latency than normal NAND, and could be compared to Intel and Micron's 3D XPoint.

Original Submission

Crossbar Searching for Funding and Customers for its ReRAM Products to Compete with Intel's Optane 3 comments

takyon writes:

Crossbar, which has talked up its version of a post-NAND memory/storage technology for years with little to show for it, now has to compete with the elephant in the room:

Crossbar, developer of Resistive RAM (ReRAM) chips, is setting up an AI consortium to help counter, er, resistance to the technology, speed up its adoption, and hopefully outrun Intel's Optane.
ReRAM is a type of non-volatile memory with DRAM-class access latency. So, flash-style solid-state storage with RAM-ish access. However, it is taking a long time to mature into a practical technology that can be deployed in devices to fill the gap between large-capacity, non-volatile, relatively slow NAND, and high-speed, relatively low capacity, volatile DRAM.
[...] Crossbar claims it can design "super dense 3D cross-point arrays, stackable with the capability to scale below 10nm, paving the way for terabytes on a single die." Beat that, Optane. Check out a white paper from the upstart here (registration needed.)
Crossbar continued to develop its ReRAM, inking a licensing agreement with Microsemi in May last year, involving the use of sub-10nm ReRAM tech in coming Microsemi products.
[...] Crossbar says it's working with Japanese authorities to review opportunities for the 2020 Olympics, including video-based event detection and response capability. We'll see if anything comes of that.

Previously: Crossbar 3D Resistive RAM Heads to Commercialization

Original Submission

Samsung Announces Mass Production of Commercial Embedded Magnetic Random Access Memory (eMRAM) 4 comments

takyon writes:

Samsung Ships First Commercial Embedded MRAM (eMRAM) Product

Samsung today announced that it has started mass production of its first commercial embedded Magnetic Random Access Memory (eMRAM). Made using its 28FDS (28nm FD-SOI[*]) process technology, the eMRAM module promises to offer higher performance and endurance when compared to eFlash. Furthermore it can be integrated into existing chips, according to the manufacturer.
[...] MRAM is one of the highest-performing and most durable non-volatile memory technologies [that] currently exists. Because its eMRAM does not require an erase cycle before writing data, it is 1,000 times faster than eFlash, Samsung says. It also uses lower voltages when compared to eFlash, and therefore consumes around 1/400th the energy during writing process, according to the maker.
On the flip side, however, MRAM's density and capacity both fall far short of 3D XPoint, DRAM, and NAND flash, which greatly reduces its addressable markets. Samsung is not formally disclosing the capacity of its new eMRAM module; the company is only saying that it yet has to tape out a 1 Gb eMRAM chip in 2019, which strongly suggests that the current offering has a lower capacity.

[*] FD-SOI: Fully Depleted Silicon On Insulator.

Original Submission

Toshiba Details XL-FLASH (Low-Latency 3D SLC NAND) 1 comment

takyon writes:

Toshiba has provided more details about XL-FLASH, a high-performance version of 3D 1-bit-per-cell NAND memory:

Last year at Flash Memory Summit, Toshiba announced XL-FLASH, a specialized low-latency SLC[*] 3D NAND flash memory that is their answer to Samsung's Z-NAND (and to a lesser extent, Intel's 3D XPoint). Few details were provided at the time, but this year Toshiba is ready to give out more information, including a timeline for bringing it to market: sampling starts next month, and mass production begins next year.
The first XL-FLASH parts will use a 128Gb die, divided into 16 planes to support a much higher degree of parallelism than existing capacity-oriented 3D NAND parts. The page size will be 4kB, significantly smaller than what most 3D NAND uses, but that's not a surprise given that XL-FLASH is storing just one bit per cell rather than three or four. Toshiba's press release does not disclose the erase block size, but we expect it to be similarly smaller than what's used in high-capacity NAND designs. As for performance, Toshiba says read latency will be less than 5 microseconds, compared to about 50 µs for their 3D TLC.

Package size is 32 GB (2 dies), 64 GB (4 dies), or 128 GB (8 dies).

3D SLC NAND should continue to improve in the future as layer counts hit 176, 256, and beyond.

[*] SLC, MLC, TLC, and QLC explainer.

Also at Guru3D.

Original Submission

Human Skin as Non-Volatile Memory 16 comments

hubie writes:

A memristor (memory resistor) is a hypothetical circuit element that, in principle, would make up the fourth basic circuit element joining the resistor, capacitor, and inductor. One of the more interesting properties of an ideal memristor is that there exists a non-liner relationship between the applied voltage and current which gives rise to non-volatile memory behavior. This has resulted in a lot of exciting research in the semiconductor industry for new and improved memory chips.

The hallmark of a memristor is that the non-linear relationship between the electric flux and charge gives rise to a voltage-current plot that exhibits a pinched hysteresis behavior, namely that it looks like a frequency-dependent Lissajous figure that always crosses the plot at the origin. If one takes a step back from solid state devices and defines memristors in terms of this voltage/current behavior, there are a number of biologic-based systems that qualify, including human skin. If skin is a memristor, does that mean that it acts like non-volatile memory? In a new paper published in Nature's open-access journal Scientific Reports, Pabst et al show that this is indeed the case. They applied direct current voltage pulses to various parts of the human skin and show that analog information can be stored for at least three minutes.

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