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Samsung's Second Generation 10nm-Class DRAM in Production

Accepted submission by takyon at 2017-12-22 19:52:04
Hardware

Samsung's second generation ("1y-nm") 8 Gb DDR4 DRAM dies are being mass produced [anandtech.com]:

Samsung late on Wednesday said that it had initiated mass production of DDR4 memory chips using its second generation '10 nm-class' fabrication process. The new manufacturing technology shrinks die size of the new DRAM chips and improves their performance as well as energy efficiency. To do that, the process uses new circuit designs featuring air spacers (for the first time in DRAM industry). The new DRAM ICs (integrated circuits) can operate at 3600 Mbit/s per pin data rate (DDR4-3600) at standard DDR4 voltages and have been validated with major CPU manufacturers already.

[...] Samsung's new DDR4 chip produced using the company's 1y nm fabrication process has an 8-gigabit capacity and supports 3600 MT/s data transfer rate at 1.2 V. The new D-die DRAM runs 12.5% faster than its direct predecessor (known as Samsung C-die, rated for 3200 MT/s) and is claimed to be up to 15% more energy efficient as well. In addition, the latest 8Gb DDR4 ICs use a new in-cell data sensing system that offers a more accurate determination of the data stored in each cell and which helps to increase the level of integration (i.e., make cells smaller) and therefore shrink die size.

Samsung says that the new 8Gb DDR4 chips feature an "approximate 30% productivity gain" when compared to similar chips made using the 1x nm manufacturing tech. UPDATE 12/21: Samsung clarified that productivity gain means increase in the number of chips per wafer. Since capacity of Samsung's C-die and D-die is the same, the increase in the number of dies equals the increase in the number of bits per wafer. Therefore, the key takeaway from the announcement is that the 1y nm technology and the new in-cell data sensing system enable Samsung to shrink die size and fit more DRAM dies on a single 300-mm wafer. Meanwhile, the overall 30% productivity gain results in lower per-die costs at the same yield and cycle time (this does not mean that the IC costs are 30% lower though) and increases DRAM bit output.

The in-cell data sensing system and air spacers will be used by Samsung in other upcoming types of DRAM, including DDR5 [soylentnews.org], LPDDR5 [wikipedia.org], High Bandwidth Memory 3.0 [wikipedia.org], and GDDR6 [soylentnews.org].

Also at Tom's Hardware [tomshardware.com].

Previously: Samsung Announces "10nm-Class" 8 Gb DRAM Chips [soylentnews.org]

Related: Samsung Announces 12Gb LPDDR4 DRAM, Could Enable Smartphones With 6 GB of RAM [soylentnews.org]
Samsung Announces 8 GB DRAM Package for Mobile Devices [soylentnews.org]
Samsung's 10nm Chips in Mass Production, "6nm" on the Roadmap [soylentnews.org]
Samsung Increases Production of 8 GB High Bandwidth Memory 2.0 Stacks [soylentnews.org]
IC Insights Predicts Additional 40% Increase in DRAM Prices [soylentnews.org]


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