Samsung's second generation ("1y-nm") 8 Gb DDR4 DRAM dies are being mass produced:
Samsung late on Wednesday said that it had initiated mass production of DDR4 memory chips using its second generation '10 nm-class' fabrication process. The new manufacturing technology shrinks die size of the new DRAM chips and improves their performance as well as energy efficiency. To do that, the process uses new circuit designs featuring air spacers (for the first time in DRAM industry). The new DRAM ICs (integrated circuits) can operate at 3600 Mbit/s per pin data rate (DDR4-3600) at standard DDR4 voltages and have been validated with major CPU manufacturers already.
[...] Samsung's new DDR4 chip produced using the company's 1y nm fabrication process has an 8-gigabit capacity and supports 3600 MT/s data transfer rate at 1.2 V. The new D-die DRAM runs 12.5% faster than its direct predecessor (known as Samsung C-die, rated for 3200 MT/s) and is claimed to be up to 15% more energy efficient as well. In addition, the latest 8Gb DDR4 ICs use a new in-cell data sensing system that offers a more accurate determination of the data stored in each cell and which helps to increase the level of integration (i.e., make cells smaller) and therefore shrink die size.
Samsung says that the new 8Gb DDR4 chips feature an "approximate 30% productivity gain" when compared to similar chips made using the 1x nm manufacturing tech.
UPDATE 12/21: Samsung clarified that productivity gain means increase in the number of chips per wafer. Since capacity of Samsung's C-die and D-die is the same, the increase in the number of dies equals the increase in the number of bits per wafer. Therefore, the key takeaway from the announcement is that the 1y nm technology and the new in-cell data sensing system enable Samsung to shrink die size and fit more DRAM dies on a single 300-mm wafer. Meanwhile, the overall 30% productivity gain results in lower per-die costs at the same yield and cycle time (this does not mean that the IC costs are 30% lower though) and increases DRAM bit output.
The in-cell data sensing system and air spacers will be used by Samsung in other upcoming types of DRAM, including DDR5, LPDDR5, High Bandwidth Memory 3.0, and GDDR6.
Also at Tom's Hardware.
Previously: Samsung Announces "10nm-Class" 8 Gb DRAM Chips
Related: Samsung Announces 12Gb LPDDR4 DRAM, Could Enable Smartphones With 6 GB of RAM
Samsung Announces 8 GB DRAM Package for Mobile Devices
Samsung's 10nm Chips in Mass Production, "6nm" on the Roadmap
Samsung Increases Production of 8 GB High Bandwidth Memory 2.0 Stacks
IC Insights Predicts Additional 40% Increase in DRAM Prices
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Samsung has announced the mass production of 12 Gb (1.5 GB) LPDDR4 DRAM chips on a 20nm process. The state-of-the-art was previously 8 Gb. The new DRAM chips could enable the production of smartphones with 6 gigabytes of RAM:
The production of 12Gb chips opens up the possibility of smartphones and tablets with 6GB of RAM using a four 12Gb chip DRAM package, as well as 3GB using just two chips in a package. A 6GB package would also only take up the same amount of space as existing 3GB packages which use 6Gb chips. The new 12Gb chips also end up being very slightly more than 30% faster than their 8Gb chips, with a per-pin speed of 4266Mbps which would give 34Gbps of bandwidth over a 64bit bus. With Samsung beginning mass production of this new memory it's only a matter of time before we start to see more devices move from 2GB to 3GB and from 4GB to 6GB of RAM.
There are several phones on the market with 4 GB of RAM, such as the Oppo Find 9, Xiaomi Mi Note Pro, ASUS ZenFone 2, Sony Xperia Z4, Lenovo K80, Huawei Ascend D8, and soon, Micromax's YU5050. These manufacturers could use 12 Gb chips to create phones with 6 GB of faster RAM without using additional chips.
Samsung Electronics has announced the production of "10nm-class" 8 gigabit DRAM chips that will be used in DDR4 modules with capacities ranging from 4 GB to 128 GB. "10nm-class" is an industry term that refers to an unspecified process somewhere between 10 nanometers and 19 nanometers.
In November, Samsung announced the production of 128 GB DDR4 registered dual inline memory modules (RDIMMs) using through silicon via (TSV) stacked dies with four 8 gigabit chips per package. Those modules used 20nm process DRAM and achieved a 2,400 Mbps data rate. The new 10nm-class memory will support a 3,200 Mbps data rate.
Samsung has announced an 8 GB LPDDR4 DRAM package intended for smartphones and tablets, using four 16 Gb (2 GB) chips manufactured on a 10nm-class process (probably 18nm):
Samsung this week announced its first LPDDR4 memory chips made using its 10nm-class DRAM fabrication technology. The new DRAM ICs feature the industry's highest density of 16 Gb, are rated to run at 4266 MT/s data rate, and open the door to more mobile devices with 8 GB of DRAM.
Earlier this year Samsung started to produce DDR4 memory using its 10nm-class DRAM manufacturing process (which is believed to be 18 nm) and recently the firm began to use it to make LPDDR4 memory devices, just as it planned. The thinner fabrication technology allowed Samsung to increase capacity of a single LPDDR4 DRAM IC to 16 Gb (up from 12 Gb at 20nm introduced in August, 2015) while retaining a 4266 MT/s transfer rate.
The first product to use the 16 Gb ICs is Samsung's 8 GB LPDDR4-4266 mobile DRAM package for smartphones, tablets, and other applications that can use LPDDR4. The device stacks four memory ICs and provides up to 34 GB/s of bandwidth when connected to an SoC using a 64-bit memory bus. The 8 GB DRAM package comes in a standard 15 mm x 15 mm x 1 mm form-factor, which is compatible with typical mobile devices, but Samsung can also make the package thinner than 1 mm to enable PoP stacking with a mobile application processor or a UFS NAND storage device.
The press release confirms the high data rate:
The new 8GB LPDDR4 operates at up to 4,266 megabits per second (Mbps), which is twice as fast as DDR4 DRAM for PCs working typically at 2,133 Mbps per pin. Assuming a 64 bit (x64) wide memory bus, this can be viewed as transmitting over 34GBs of data per second.
Tune in next year when I post about Samsung putting 12 GB of RAM in smartphones.
Previously:
Samsung Announces 12Gb LPDDR4 DRAM, Could Enable Smartphones With 6 GB of RAM
Samsung Announces "10nm-Class" 8 Gb DRAM Chips
Samsung has shipped 70,000 silicon wafers worth of "10nm Low Power Early" chips, and is planning a supposed 6 nanometer process. The company implies that it will make 8nm and 6nm chips in addition to 10nm and 7nm:
It's looking like Samsung will be the first company to manufacture 10nm chips, besting both Intel and TSMC. Samsung has also already set its eyes on the 8nm, 7nm, and 6nm process technologies. The 8nm and 6nm processes will likely be follow-up technologies to the 10nm and 7nm processes, respectively.
The company is expected to reach 7nm by 2019, a move that could be enabled by its partnership with IBM. The company may also use EUV lithography for its 7nm process, but it's not yet clear whether EUV lithography will be available for the first ever 7nm process iteration. Intel has hinted before that it may not adopt EUV lithography until the 5nm process generation. Samsung will reveal more details about its roadmap, including the 8nm and 6nm process generations, at the upcoming U.S Samsung Foundry Forum scheduled for May 24, 2017.
JEDEC has announced that it expects to finalize the DDR5 standard by next year. It says that DDR5 will double bandwidth and density, and increase power efficiency, presumably by lowering the operating voltages again (perhaps to 1.1 V). Availability of DDR5 modules is expected by 2020:
You may have just upgraded your computer to use DDR4 recently or you may still be using DDR3, but in either case, nothing stays new forever. JEDEC, the organization in charge of defining new standards for computer memory, says that it will be demoing the next-generation DDR5 standard in June of this year and finalizing the standard sometime in 2018. DDR5 promises double the memory bandwidth and density of DDR4, and JEDEC says it will also be more power-efficient, though the organization didn't release any specific numbers or targets.
The DDR4 SDRAM specification was finalized in 2012, and DDR3 in 2007, so DDR5's arrival is to be expected (cue the Soylentils still using DDR2). One way to double the memory bandwidth of DDR5 is to double the DRAM prefetch to 16n, matching GDDR5X.
Graphics cards are beginning to ship with GDDR5X. Some graphics cards and Knights Landing Xeon Phi chips include High Bandwidth Memory (HBM). A third generation of HBM will offer increased memory bandwidth, density, and more than 8 dies in a stack. Samsung has also talked about a cheaper version of HBM for consumers with a lower total bandwidth. SPARC64 XIfx chips include Hybrid Memory Cube. GDDR6 SDRAM could raise per-pin bandwidth to 14 Gbps, from the 10-14 Gbps of GDDR5X, while lowering power consumption.
SK Hynix is almost ready to produce GDDR6 memory with higher than expected per-pin bandwidth:
In a surprising move, SK Hynix has announced its first memory chips based on the yet-unpublished GDDR6 standard. The new DRAM devices for video cards have capacity of 8 Gb and run at 16 Gbps per pin data rate, which is significantly higher than both standard GDDR5 and Micron's unique GDDR5X format. SK Hynix plans to produce its GDDR6 ICs in volume by early 2018.
GDDR5 memory has been used for top-of-the-range video cards for over seven years, since summer 2008 to present. Throughout its active lifespan, GDDR5 increased its data rate by over two times, from 3.6 Gbps to 9 Gbps, whereas its per chip capacities increased by 16 times from 512 Mb to 8 Gb. In fact, numerous high-end graphics cards, such as NVIDIA's GeForce GTX 1060 and 1070, still rely on the GDDR5 technology, which is not going anywhere even after the launch of Micron's GDDR5X with up to 12 Gbps data rate per pin in 2016. As it appears, GDDR6 will be used for high-end graphics cards starting in 2018, just two years after the introduction of GDDR5X.
Previously: Samsung Announces Mass Production of HBM2 DRAM
DDR5 Standard to be Finalized by JEDEC in 2018
In response to increased demand, Samsung is increasing production of the densest HBM2 DRAM available:
Samsung on Tuesday announced that it is increasing production volumes of its 8 GB, 8-Hi HBM2 DRAM stacks due to growing demand. In the coming months the company's 8 GB HBM2 chips will be used for several applications, including those for consumers, professionals, AI, as well as for parallel computing. Meanwhile, AMD's Radeon Vega graphics cards for professionals and gamers will likely be the largest consumers of HBM2 in terms of volume. And while AMD is traditionally a SK Hynix customer, the timing of this announcement with AMD's launches certainly suggests that AMD is likely a Samsung customer this round as well.
Samsung's 8 GB HBM Gen 2 memory KGSDs (known good stacked die) are based on eight 8-Gb DRAM devices in an 8-Hi stack configuration. The memory components are interconnected using TSVs and feature over 5,000 TSV interconnects each. Every KGSD has a 1024-bit bus and offers up to 2 Gbps data rate per pin, thus providing up to 256 GB/s of memory bandwidth per single 8-Hi stack. The company did not disclose power consumption and heat dissipation of its HBM memory components, but we have reached out [to] Samsung for additional details.
Previously:
Samsung Announces Mass Production of HBM2 DRAM
CES 2017: AMD Vega GPUs and FreeSync 2
AMD Launches the Radeon Vega Frontier Edition
IC Insights has predicted that DRAM prices will continue to increase this year:
According to IC Insights, DRAM prices will continue to increase even though they have more than doubled (+111%) over the last 12 months. IC Insights predicts that by the end of the calendar year DRAM's price per bit will have jumped a record 40% (or more).
[...] Of course, the record pricing levels are great for our friends at the major foundries. Samsung, Micron, and Sk Hynix are also raking in their own record profits and enjoying healthy margins. We have both DRAM and NAND shortages occurring at the same time, which is great for the foundries, and unless a player breaks ranks to gain market share, we can expect more foot-dragging before any of the foundries increases output.
The booming mobile industry and server markets are exacerbating the issue, so you would expect that the fabs would boost DRAM output. Unfortunately, the three primary fabs (Micron bought Elpida, reducing the number of players) don't share the same vision.
IC Insights indicates that Micron will not increase production capacity, instead relying upon improvements in yields and shrinking down to smaller nodes to boost its DRAM bit output. Sk Hynix has expressed its desire to boost DRAM output but hasn't set a firm timeline for fab expansion (unlikely to occur in the near term). Samsung is as tight-lipped as usual, so we aren't sure of its intentions.
In the 1980s there were 23 major DRAM suppliers, but cutthroat pricing and continual oversupplies eventually led to the wave of consolidation that left us with the current three suppliers.
Previously:
December 2015: DDR4 Memory Prices Declined 40% in 6 Months
May 2017:
DRAM Price Surge Continues
Samsung Set to Outpace Intel in Semiconductor Revenues
July 2017:
Micron Temporarily Suspends Operation of DRAM Production Facility
Samsung Increases Production of 8 GB High Bandwidth Memory 2.0 Stacks
August 2017:
DRAM Prices Continue to Climb
Samsung & SK Hynix Graphics Memory Prices Increase Over 30% In August
Samsung Preps to Build Another Multi-Billion Dollar Memory Fab Near Pyeongtaek
Samsung has begun preparations to build another semiconductor production facility near Pyeongtaek, South Korea. The fab will produce various types of memory as the market demands, and if unofficial information is correct, the new fab may be larger than the adjacent fab that began operations last year.
At present the upcoming fab is called the P2 Project and it will be located adjacent to the existing fab near Pyeongtaek. Samsung has already started to establish infrastructure for the production facility — it ordered the construction of gas pipes for the new production facility in January and is expected to start other works shortly. ETNews reports that Samsung is looking at investing ₩30 trillion ($27.8 billion) in the new P2 Project facility, but does not elaborate whether the number represents total investments, or initial investments. ₩30 trillion is the total amount of money that Samsung has already invested and plans to invest in its existing fab near Pyeongtaek by 2021. Considering the fact that the P2 is in an early stage of planning, it is unlikely that the company has finalized its investments plans.
Related: Samsung Set to Outpace Intel in Semiconductor Revenues
Samsung Could Boost NAND Production Capacity, WD Intervenes in Toshiba Memory Sale
Samsung Plans a "4nm" Process
GlobalFoundries to Spend $10-12 Billion on a 7nm Fab, Possibly $14-18 Billion for 5nm
Samsung's Second Generation 10nm-Class DRAM in Production
TSMC Holds Groundbreaking Ceremony for "5nm" Fab, Production to Begin in 2020
Samsung has announced the mass production of 16 Gb GDDR6 SDRAM chips with a higher-than-expected pin speed. The chips could see use in upcoming graphics cards that are not equipped with High Bandwidth Memory:
Samsung has beaten SK Hynix and Micron to be the first to mass produce GDDR6 memory chips. Samsung's 16Gb (2GB) chips are fabricated on a 10nm process and run at 1.35V. The new chips have a whopping 18Gb/s pin speed and will be able to reach a transfer rate of 72GB/s. Samsung's current 8Gb (1GB) GDDR5 memory chips, besides having half the density, work at 1.55V with up to 9Gb/s pin speeds. In a pre-CES 2018 press release, Samsung briefly mentioned the impending release of these chips. However, the speed on release is significantly faster than the earlier stated 16Gb/s pin speed and 64GB/s transfer rate.
18 Gbps exceeds what the JEDEC standard calls for.
Also at Engadget and Wccftech.
Related: GDDR5X Standard Finalized by JEDEC
DDR5 Standard to be Finalized by JEDEC in 2018
SK Hynix to Begin Shipping GDDR6 Memory in Early 2018
Samsung's Second Generation 10nm-Class DRAM in Production
(Score: -1, Offtopic) by Anonymous Coward on Saturday December 23 2017, @04:55PM
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