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takyon writes:

Intel's "Tick-Tock" strategy of micro-architectural changes followed by die shrinks has officially stalled. Although Haswell and Broadwell chips have experienced delays, and Broadwell desktop chips have been overshadowed by Skylake, delays in introducing 10nm process node chips have resulted in Intel's famously optimistic roadmap missing its targets by about a whole year. 10nm Cannonlake chips were set to begin volume production in late 2016, but are now scheduled for the second half of 2017. In its place, a third generation of 14nm chips named "Kaby Lake" will be launched. It is unclear what improvements Kaby Lake will bring over Skylake.

Intel will not be relying on the long-delayed extreme ultraviolet (EUV) lithography to make 10nm chips. The company's revenues for the last quarter were better than expected, despite the decline of the PC market. Intel's CEO revealed the stopgap 14nm generation at the Q2 2015 earnings call:

"The lithography is continuing to get more difficult as you try and scale and the number of multi-pattern steps you have to do is increasing," [Intel CEO Brian Krzanich] said, adding, "This is the longest period of time without a lithography node change."

[...] But Krzanich seemed confident that letting up on the gas, at least for now, is the right move – with the understanding that Intel will aim to get back onto its customary two-year cycle as soon as possible. "Our customers said, 'Look, we really want you to be predictable. That's as important as getting to that leading edge'," Krzanich said during Wednesday's earnings call. "We chose to actually just go ahead and insert – since nothing else had changed – insert this third wave [with Kaby Lake]. When we go from 10-nanometer to 7-nanometer, it will be another set of parameters that we'll reevaluate this."

takyon writes:

Intel may finally be abandoning its "Tick-Tock" strategy:

As reported at The Motley Fool, Intel's latest 10-K / annual report filing would seem to suggest that the 'Tick-Tock' strategy of introducing a new lithographic process note in one product cycle (a 'tick') and then an upgraded microarchitecture the next product cycle (a 'tock') is going to fall by the wayside for the next two lithographic nodes at a minimum, to be replaced with a three element cycle known as 'Process-Architecture-Optimization'.

Intel's Tick-Tock strategy has been the bedrock of their microprocessor dominance of the last decade. Throughout the tenure, every other year Intel would upgrade their fabrication plants to be able to produce processors with a smaller feature set, improving die area, power consumption, and slight optimizations of the microarchitecture, and in the years between the upgrades would launch a new set of processors based on a wholly new (sometimes paradigm shifting) microarchitecture for large performance upgrades. However, due to the difficulty of implementing a 'tick', the ever decreasing process node size and complexity therein, as reported previously with 14nm and the introduction of Kaby Lake, Intel's latest filing would suggest that 10nm will follow a similar pattern as 14nm by introducing a third stage to the cadence.

This suggests that 10nm "Cannonlake" chips will be released in 2017, followed by a new 10nm architecture in 2018 (tentatively named "Ice Lake"), optimization in 2019 (tentatively named "Tiger Lake"), and 7nm chips in 2020. This year's "optimization" will come in the form of "Kaby Lake", which could end up making underwhelming improvements such as slightly higher clock speeds, due to higher yields of the previously-nameed "Skylake" chips. To be fair, Kaby Lake will supposedly add the following features alongside any CPU performance tweaks:

Kaby Lake will add native USB 3.1 support, whereas Skylake motherboards require a third-party add-on chip in order to provide USB 3.1 ports. It will also feature a new graphics architecture to improve performance in 3D graphics and 4K video playback. Kaby Lake will add native HDCP 2.2 support. Kaby Lake will add full fixed function HEVC Main10/10-bit and VP9 10-bit hardware decoding.

Previously: Intel's "Tick-Tock" Strategy Stalls, 10nm Chips Delayed

Original Submission

takyon writes:

Intel is talking about improvements it has made to transistor scaling for the 10nm process node, and claims that its version of 10nm will increase transistor density by 2.7x rather than doubling it.

On the face of it, three years between process shrinks, rather than the traditional two years, would appear to end Moore's Law. But Intel claims that's not so. The company says that the 14nm and 10nm process shrinks in particular more than doubled the transistor density. At 10nm, for example, the company names a couple of techniques that are enabling this "hyperscaling." Each logic cell (an arrangement of transistors to form a specific logic gate, such as a NAND gate or a flip flop) is surrounded by dummy gates: spacers to isolate one cell from its neighbor. Traditionally, two dummy gates have been used at the boundary of each cell; at 10nm, Intel is reducing this to a single dummy gate, thereby reducing the space occupied by each cell and allowing them to be packed more tightly.

Each gate has a number of contacts used to join them to the metal layers of the chip. Traditionally, the contact was offset from the gate. At 10nm, Intel is stacking the contacts on top of the gates, which it calls "contact over active gate." Again, this reduces the space each gate takes, increasing the transistor density.

takyon writes:

Intel Issues Update on 14nm Shortage, Invests $1B Into Fab Sites (Update)

Intel's CFO and interim CEO Bob Swan penned an open letter to its customers and partners today outlining the steps it is taking to address a persistent and worsening shortage of 14nm processors.

[...] The shortage impacts nearly every aspect of Intel's business, from desktops to laptops, servers and even chipsets, so Intel is making the sound business decision to prioritize high-margin products. The firm has also expanded its testing capacity by diverting some work to a facility in Vietnam.

[...] Intel's statement also assures us that processors built on its 10nm fabrication will arrive in volume in 2019. Intel had previously stated that 10nm processors would be available in 2019, but hadn't made the distinction that they would arrive in volume. That's a positive sign, as the oft-delayed 10nm production is surely a contributing factor to the shortage. Intel also cites the booming desktop PC market, which has outstripped the company's original estimates earlier this year, as a catalyst.

In either case, Intel concedes that "supply is undoubtedly tight, particularly in the entry-level of the PC market" but doesn't provide a firm timeline for when the processors will become fully available. Intel's letter also touts its $1 billion investment in 14nm fabs this year, but half of that capital expenditure was scheduled prior to its first public acknowledgement of the shortage. Given Intel's foresight into the production challenges, the prior $500 million investment was likely in response to the increases in demand and looming production shortfall.

Previously: Intel Migrates New Chipsets to "22nm" Node From "14nm"

Related: Intel's "Tick-Tock" Strategy Stalls, 10nm Chips Delayed
Intel's First 8th Generation Processors Are Just Updated 7th Generation Chips
Intel Delays Mass Production Of 10 nm CPUs To 2019

Original Submission

takyon writes:

Intel: EUV-Enabled 7nm Process Tech is on Track

Originally planned to enter mass production in the second half of 2016, Intel's 10nm process technology is still barely used by the company today. Currently the process is used to produce just a handful of CPUs, ahead of an expected ramp to high-volume manufacturing (HVM) only later in 2019. Without a doubt, Intel suffered delays on its 10nm process by several years, significantly impacting the company's product lineup and its business.

Now, as it turns out, Intel's 10nm may be a short-living node as the company's 7nm tech is on-track for introduction in accordance with its original schedule.

For a number of times Intel said that it set too aggressive scaling/transistor density targets for its 10nm fabrication process, which is why its development ran into problems. Intel's 10nm manufacturing tech relies exclusively on deep ultraviolet lithography (DUVL) with lasers operating on a 193 nm wavelength. To enable the fine feature sizes that Intel set out to achieve on 10nm, the process had to make heavy usage of mutli-patterning. According to Intel, a problem of the process was precisely its heavy usage of multipatterning (quad-patterning to be more exact).

By contrast, Intel's 7nm production tech will use extreme ultraviolet lithography (EUVL) with laser wavelength of 13.5 nm for select layers, reducing use of multipatterning for certain metal layers and therefore simplifying production and shortening cycle times. As it appears, the 7nm fabrication process had been in development separately from the 10nm tech and by a different team. As a result, its development is well underway and is projected to enter HVM in accordance with Intel's unannounced roadmap, the company says.

Meanwhile, an unconfirmed leak of AMD's Ryzen 3000 lineup shows a 12-core CPU at $300 and a 16-core CPU at $450.

Previously: Intel Delays Mass Production Of 10 nm CPUs To 2019
Intel Releases Open Letter in Attempt to Address Shortage of "14nm" Processors and "10nm" Delays
Intel Denies that It Will Cancel or Skip its "10nm" Process

Original Submission

takyon writes:

CES 2019 Quick Bytes: Consumer 10nm is Coming with Intel's Ice Lake

We've been on Intel's case for years to tell us when its 10nm parts are coming to the mass market. Technically Intel already shipped its first 10nm processor, Cannon Lake, but this was low volume and limited to specific geographic markets. This time Intel is promising that its first volume consumer processor on 10nm will be Ice Lake. It should be noted that Intel hasn't put a date on Ice Lake launching, but has promised 10nm on shelves by the end of 2019. It has several products that could qualify for that, but Ice Lake is the likely suspect.

At Intel's Architecture Day in December, we saw chips designated as 'Ice Lake-U', built for 15W TDPs with four cores using the new Sunny Cove microarchitecture and Gen11 graphics. Intel went into some details about this part, which we can share with you today.

The 15W processor is a quad core part supporting two threads per core, and will have 64 EUs of Gen11 graphics. 64 EUs will be the standard 'GT2' mainstream configuration for this generation, up from 24 EUs today. In order to drive that many execution units, Intel stated that they need 50-60 GB/s of memory bandwidth, which will come from LPDDR4X memory. In order for those numbers to line up, they will need LPDDR4X-3200 at a minimum, which gives 51.2 GB/s. [...] For connectivity, the chips will support Wi-Fi 6 (802.11ax) if the laptop manufacturer uses the correct interface module, but the support for Wi-Fi 6 is in the chip. The processor also supports native Thunderbolt 3 over USB Type-C, marking the first Intel chip with native TB3 support.

takyon writes:

Intel 9th Gen Core Processors: All the Desktop and Mobile 45W CPUs Announced

Dubbed 'Coffee Lake Refresh', the 9th generation of Intel's Core CPU product line is a direct refresh of its 8th generation Coffee Lake hardware, with minor enhancements such as a better thermal interface on the high end processors, support for up to 8 cores, and newer chipsets with integrated USB 3.1 Gen2 (10Gbps) and CNVi-enabled Wi-Fi. The hardware is still fundamentally the original 6th Gen Skylake microarchitecture underneath, from 2016, but built on Intel's latest 14nm process variant, in order to extract additional frequency and efficiency, and with more cores at the high-end.

Intel may continue to be largely stuck on a "14nm" process for years to come:

Intel CPU 2018-2021 Roadmap Leaks Out – Up To 10 Core Comet Lake-S Desktop CPUs in 2020, 14nm Rocket Lake-S in 2021, No 10nm LGA Parts Till 2022

The latest roadmaps come from Tweakers and detail both the Client Commercial CPU products and the Client Mobile CPU products which would be introduced in the future. The authenticity of these roadmaps cannot be confirmed but they are referenced back to the Intel's SIP program and DELL so there might be some legitimacy to them.

[...] It looks like Intel will stick with 14nm++ for a while as the roadmap reveals. Around Q2 2020, Intel will launch their Comet Lake-S processors, featuring up to 10 core SKUs. These would be followed by Intel's Rocket Lake-S parts which would also be based on an optimized 14nm process node. It looks like we can expect a 10nm or sub-10nm part from Intel only around 2022 which is about the same time Intel is expected to launch their Ocean Cove CPU architecture.

Ocean Cove is a future chip architecture under development at Intel which will launch after Golden Cove (2021), the successor to Willow Cove (2020) which itself is the successor to Intel's Sunny Cove (Ice Lake) core's architecture.

The roadmap shows Intel using "10nm" sooner for some mobility (laptop) CPUs.

Original Submission

takyon writes:

Intel's 10th Gen, 10nm Ice Lake CPUs: everything you need to know

Intel has a lot to prove. 2018 marked the chipmaker's 50th anniversary, but it was also a year that shook the company to its core. It was the year that Intel lost its CEO, struggled with Spectre and Meltdown, and reportedly lost Apple's confidence as far as chips for future Macs are concerned. Above all, it was the year the world finally realized Intel processors had hit a wall, after yet another failure to shrink its circuits down to the "10 nanometer" process node.

But now, after years of delays, the company is about to bring its first real batch[*] of 10nm CPUs to the world. Today, the company is officially taking the wraps off its 10th Gen Intel Core processors, codename "Ice Lake," and revealing some of what they might be able to do for your next PC when they ship in June.

[*] 18% IPC improvement *loud coughing* compared "against the Skylake cores the company released nearly four years ago!"

Also at AnandTech and Tom's Hardware.

Original Submission

upstart writes:

Submitted via IRC for Bytram

HP boss: Intel shortages are steering our suited customers to buy AMD

With the Windows 7 refresh cycles forecast to run and run, Intel's protracted CPU shortage is sending conservative corporate enterprise buyers into the arms of AMD – or so says HP Inc's CEO.

Dion Weisler took to the stage late last week at Wall Street financial analyst Bernstein's annual conference to discuss HP and the wider industry.

He told Bernstein IT Hardware researcher Toni Sacconaghi that HP was was having some success promoting AMD to suited customers – you know the types, those who historically never got fired for buying IBM.

"It's hard to change commercial behaviour because for the longest time Intel has done an incredible job in the commercial space of selling the value proposition of Intel. And in many cases, it may be a superior product," Weisler said.

"Commercial customers have made a decision. In times of extended shortage, a customer then has to choose between 'Do I have nothing or do I give this a try?' And when they give it a try and that's a good experience, barriers have been broken."

[...] Mikako Kitigawa, senior principal analyst at Gartner, said she had also heard that CPU shortages had been "impacting refresh cycles of corporate customers".

"We have also heard that corporations started considering AMD-based PCs," he told The Reg. "Even if these companies are not impacted by the shortage this time, some of them started preparing for plan B for future events like this because it is too risky to rely on a single vendor."

Weisler said he expects the Windows 7 refresh buying pattern to continue well into next year. He estimated that about a fifth of the installed based has yet to replace ageing stocks.

See also: AMD Zen-based Hygon chips start putting the squeeze on Intel in China

Original Submission

takyon writes:

Intel's Senior Vice President Jim Keller (who previously helped to design AMD's K8 and Zen microarchitectures) gave a talk at the Silicon 100 Summit that promised continued pursuit of transistor scaling gains, including a roughly 50x increase in gate density:

Intel's New Chip Wizard Has a Plan to Bring Back the Magic (archive)

In 2016, a biennial report that had long served as an industry-wide pledge to sustain Moore's law gave up and switched to other ways of defining progress. Analysts and media—even some semiconductor CEOs—have written Moore's law's obituary in countless ways. Keller doesn't agree. "The working title for this talk was 'Moore's law is not dead but if you think so you're stupid,'" he said Sunday. He asserted that Intel can keep it going and supply tech companies ever more computing power. His argument rests in part on redefining Moore's law.

[...] Keller also said that Intel would need to try other tactics, such as building vertically, layering transistors or chips on top of each other. He claimed this approach will keep power consumption down by shortening the distance between different parts of a chip. Keller said that using nanowires and stacking his team had mapped a path to packing transistors 50 times more densely than possible with Intel's 10 nanometer generation of technology. "That's basically already working," he said.

The ~50x gate density claim combines ~3x density from additional pitch scaling (from "10nm"), ~2x from nanowires, another ~2x from stacked nanowires, ~2x from wafer-to-wafer stacking, and ~2x from die-to-wafer stacking.

Related: Intel's "Tick-Tock" Strategy Stalls, 10nm Chips Delayed
Intel's "Tick-Tock" is Now More Like "Process-Architecture-Optimization"
Moore's Law: Not Dead? Intel Says its 10nm Chips Will Beat Samsung's
Another Step Toward the End of Moore's Law

Original Submission

takyon writes:

What's wrong with Intel, and how to fix it: Former principal engineer unloads (archive)

In a blunt video posted late Thursday evening, outspoken former Intel principal engineer Francois Pidnoel offered his advice on how to "fix" Intel CPUs, criticized current leadership for not being engineers, said AVX512 was a misadventure, and declared that it's only luck AMD hasn't grabbed more market share.

"First, Intel is really out of focus," Piednoel said in the nearly hour-long video presentation. "The leaders of Intel today are not engineers, they are not people who understand what to design to the market."

[...] Pidnoel flat-out dismissed including AVX512 in consumer chips as a mistake. "You had Skylake and Skylake X for a reason," Piednoel said. "AVX512 is designed for a race of throughput that is lost to the GPU already. There's two ways to get throughput. One is to get the throughput is by having larger vectors to your core, and the other way is to have more cores."

[...] "Intel is very lucky AMD cannot get the volume, to be able to compete," Piednoel. "If they were getting volume, the price difference would definitely cost Intel market share a lot more than what they are losing right now."

Related: AVX-512: A "Hidden Gem"?
Intel CEO Blames "10nm" Delays on Aggressive Density Target, Promises "7nm" for 2021
Intel's Process Nodes Will Trail Behind Competitors Until at Least Late 2021
Linus Torvalds: Don't Hide Rust in Linux Kernel; Death to AVX-512
Intel Engineering Chief Out After 7nm Product Delays
Intel Faces Class-Action Lawsuit Over "7nm" Delays

Original Submission