Samsung Preparing to Build Another Memory Fab Near Pyeongtaek for $27.8 Billion

Samsung Set to Outpace Intel in Semiconductor Revenues 8 comments

Based on current projections for sales and NAND/DRAM pricing, Samsung's semiconductor revenues are likely to grow larger than Intel's during the second quarter of 2017. Intel has held the #1 spot in the industry since 1993:

Samsung's positioning is strengthening not just because of increased demand for RAM and flash memory, but because an ongoing NAND shortage is keeping prices high. Analysts blame a rocky transition from 2D to 3D NAND, increased demand from Chinese smartphone manufacturers, and the increasing popularity of SSDs as factors in the shortage.
On top of the RAM business, Samsung also says it's seeing solid demand for 14nm SoCs, image sensors, and other smartphone chips. The company expects its new 10nm process to keep the business growing. Samsung manufactures its own Exynos SoCs as well as some of Qualcomm's Snapdragon chips and some of the A-series chips Apple uses across its iPhone, iPad, iPod, and Apple TV lineups.

IC Insights report.

Original Submission

Samsung Could Boost NAND Production Capacity, WD Intervenes in Toshiba Memory Sale 3 comments

takyon writes:

http://www.reuters.com/article/us-samsung-elec-chips-idUSKBN18P04K

Tech giant Samsung Electronics Co Ltd said on Monday it is considering adding NAND memory chip production capacity at its manufacturing base in China amid an industry-wide boom that will likely fuel record sales for memory suppliers.
Samsung, the world's biggest memory chip maker by sales, has already invested $7 billion in the Xi'an facility to make 3D NAND memory chips. The chips are used for high-end data storage products on electronic devices such as smartphones, personal computers and data servers, and their prices have surged in recent months as suppliers struggle to keep up with demand.
[...] Researcher IHS expects this year's memory industry revenue to jump 32 percent to a record $104 billion.

Recently, Western Digital sought to intervene in the sale of Toshiba's memory business, rather than purchase the division itself. Originally valued at $18 billion, Foxconn has bid $27 billion and Broadcom bid $28 billion.

Western Digital, through its SanDisk subsidiary, is seeking arbitration to prevent Toshiba from selling off its stake in their flash memory joint venture without the consent of Western Digital. [...] Western Digital does have leverage in their preexisting relationship with Toshiba as co-owner of their flash memory joint venture. Western Digital is alleging that Toshiba is required to obtain Western Digital's consent before spinning off or selling Toshiba Memory, and that Toshiba's actions so far have violated their agreements with Western Digital. Western Digital has initiated arbitration proceedings against Toshiba, seeking to block further action without Western Digital's consent and to reverse the Toshiba Memory spin-off.

Original Submission

Samsung Plans a "4nm" Process 12 comments

takyon writes:

Samsung has added a so-called "4nm" process to its roadmap:

At the annual Samsung Foundry Forum, Samsung announced its foundry's roadmap for the next few years, which includes an 18nm FD-SOI [(Fully Depleted – Silicon on Insulator)] generation targeting low-cost IoT chips as well as 8nm, 7nm, 6nm, 5nm, and even 4nm process generations.
[...] 7LPP (7nm Low Power Plus): 7LPP will be the first semiconductor process technology to use an EUV lithography solution. 250W of maximum EUV source power, which is the most important milestone for EUV insertion into high volume production, was developed by the collaborative efforts of Samsung and ASML. EUV lithography deployment will break the barriers of Moore's law scaling, paving the way for single nanometer semiconductor technology generations.
[...] The 4LPP process generation will be Samsung's first to use a "Gate All Around FET" (GAAFET) transistor structure, with Samsung's own implementation dubbed "Multi Bridge Channel FET" (MBCFET). The technology uses a "Nanosheet" device to overcome the physical limitations of the FinFET architecture.

Source.

But how many transistors per square millimeter is it?

Original Submission

GlobalFoundries to Spend $10-12 Billion on a 7nm Fab, Possibly $14-18 Billion for 5nm 9 comments

takyon writes:

GlobalFoundries: Next-generation chip factories will cost at least $10 billion

The economics of the chip industry are pretty staggering. Sanjay Jha, CEO of contract chip manufacturer Globalfoundries, recently told me that it could cost between $10 billion and $12 billion to build a next-generation chip factory based on the latest technology, dubbed 7-nanometer production. And one for the generation after that, dubbed 5-nanometer production, could cost $14 billion to $18 billion.
There are only a few companies in the world that can afford to spend that much money on a chip factory. And they can do it because those chips are expected to generate billions of dollars in revenue over the life of the factory.

Dean Takahashi from VentureBeat interviewed Sanjay Jha, CEO of GlobalFoundries:

Basically, the numbers don't mean much these days. I think Samsung has talked about 10nm, 11nm, 14nm, 8nm, 7nm, 6nm. I don't know what they mean. The way to think about 12nm is it has higher performance and more scale than 14nm. It's not quite the scaling or performance of 10nm. Performance may be very close to 10nm, though.

Samsung's Second Generation 10nm-Class DRAM in Production 1 comment

takyon writes:

Samsung's second generation ("1y-nm") 8 Gb DDR4 DRAM dies are being mass produced:

Samsung late on Wednesday said that it had initiated mass production of DDR4 memory chips using its second generation '10 nm-class' fabrication process. The new manufacturing technology shrinks die size of the new DRAM chips and improves their performance as well as energy efficiency. To do that, the process uses new circuit designs featuring air spacers (for the first time in DRAM industry). The new DRAM ICs (integrated circuits) can operate at 3600 Mbit/s per pin data rate (DDR4-3600) at standard DDR4 voltages and have been validated with major CPU manufacturers already.
[...] Samsung's new DDR4 chip produced using the company's 1y nm fabrication process has an 8-gigabit capacity and supports 3600 MT/s data transfer rate at 1.2 V. The new D-die DRAM runs 12.5% faster than its direct predecessor (known as Samsung C-die, rated for 3200 MT/s) and is claimed to be up to 15% more energy efficient as well. In addition, the latest 8Gb DDR4 ICs use a new in-cell data sensing system that offers a more accurate determination of the data stored in each cell and which helps to increase the level of integration (i.e., make cells smaller) and therefore shrink die size.
Samsung says that the new 8Gb DDR4 chips feature an "approximate 30% productivity gain" when compared to similar chips made using the 1x nm manufacturing tech.
UPDATE 12/21: Samsung clarified that productivity gain means increase in the number of chips per wafer. Since capacity of Samsung's C-die and D-die is the same, the increase in the number of dies equals the increase in the number of bits per wafer. Therefore, the key takeaway from the announcement is that the 1y nm technology and the new in-cell data sensing system enable Samsung to shrink die size and fit more DRAM dies on a single 300-mm wafer. Meanwhile, the overall 30% productivity gain results in lower per-die costs at the same yield and cycle time (this does not mean that the IC costs are 30% lower though) and increases DRAM bit output.

The in-cell data sensing system and air spacers will be used by Samsung in other upcoming types of DRAM, including DDR5, LPDDR5, High Bandwidth Memory 3.0, and GDDR6.

Also at Tom's Hardware.

Previously: Samsung Announces "10nm-Class" 8 Gb DRAM Chips

Original Submission

TSMC Holds Groundbreaking Ceremony for "5nm" Fab, Production to Begin in 2020 3 comments

takyon writes:

Taiwan Semiconductor Manufacturing Company (TSMC) plans to make so-called "5nm" chips starting in early 2020:

TSMC last week held a groundbreaking ceremony for its Fab 18 phase 1 production facility. The fab will produce chips using TSMC's 5 nm process starting from early 2020. When all three phases of the manufacturing facility are completed, its wafer starts capacity will exceed one million 300-mm wafers per year, comparable with other three GigaFabs operated by TSMC.
TSMC's Fab 18 will be located in Tainan (in the Southern Taiwan Science Park), and will be built in three phases. The construction of the first phase or segment of the building will be completed in about a year from now, after which TSMC will move in equipment sometime in early 2019. In about two years from now, the company expects to start volume production of chips using its 5 nm process technology at the Fab 18/phase 1. Construction of the second and the third phases will commence in Q3 2018 and Q3 2019. The two phases will start volume production in 2020 and 2021, respectively.

Extreme ultraviolet (EUV) lithography could be used to make "7nm" chips, but not "5nm" yet.

Original Submission

Weak Demand for DRAM Could Lead to Price Decreases in 2019 23 comments

takyon writes:

Screeech... DRAM! Weak demand hits memory-makers as they slam on CAPEX brakes – analyst

The three DRAM suppliers are scaling back production growth as memory demand falters with no sign of recovery. The DRAMeXchange research outfit has said annual DRAM capital expenditure (CAPEX) growth has gone negative for 2019 as Samsung, SK Hynix and Micron respond to weak seasonal demand in the first quarter and beyond. DRAM prices had risen for nine consecutive quarters until the last 2018 quarter, when they fell 10 per cent compared to the third quarter.
The demand outlook for PCs, servers, smartphones, and other end-consumer products is weak and the threat of a China-US trade war is not helping things. DRAMeXchange expects first quarter DRAM prices to show a 15 per cent fall, and see 10 per cent in the next, and then 5 per cent in both the third and fourth quarters, unless something positive happens, like China and the USA becoming best buddies.
The three DRAM suppliers are locked into some production output growth this year but have scaled back their CAPEX plans and reduced growth expectations as a result of the price falls.

Original Submission

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