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takyon writes:

Samsung recently announced its fourth generation of 3D/vertical NAND, with 64 layers and a capacity of 512Gb (64GB) per die. Now SK Hynix is announcing its plans for 512 Gb V-NAND dies with 72 layers:

Later this year SK Hynix intends to start volume production of 72-layer 3D TLC NAND (3D-V4) memory and this is where things start to get interesting. Initially, SK Hynix intends to produce 256 Gb 3D TLC ICs and these are going to be available already in Q2 2017, according to the company's product catalog. Later on, sometimes in Q4, the company plans to introduce 512 Gb 3D TLC ICs (64 GB), which will help it to significantly increase capacities of SSDs and other devices featuring NAND flash.

What is important about SK Hynix's fourth-gen 3D NAND is that it will feature block size of 13.5 MB, which will increase the performance of such ICs compared to 3D-V3 and 3D-V2 that have a block size of 9 MB. At this point, we do not know whether SK Hynix intends to increase interface speed of its 512 Gb 3D-V4 ICs to compensate lower parallelism in lower-capacity SSDs, like Samsung did with its high-capacity 64-layer 3D V-NAND chips. What we do know is that SK Hynix's catalog already includes NAND multi-chip packages of 8192 Gb capacity (1 TB) that will enable high-capacity SSDs in smaller form-factors (e.g., [2 TB] single-sided M.2). Meanwhile, 64 GB NAND flash chips may force SK Hynix and its partners to abandon low-capacity SSDs (i.e., 120/128 GB) unless there is sufficient demand.

The article also talks about the company's plans for 18nm DRAM and fabrication facility expansion.

Related: Toshiba and SanDisk Announce 48-Layer 256 Gb 3D NAND
Toshiba Teasing QLC 3D NAND and TSV for More Layers

Original Submission

takyon writes:

SK Hynix is currently developing 96-layer and 128-layer 3D NAND with 3 bits per cell, but may be skipping quad-level cell 3D NAND for some time:

The 64-layer 3D NAND about to land from Micron and Toshiba certainly sounds impressive, but it pales in comparison to what Sk Hynix is working on for future release. The company is developing 96-layer and 128-layer 3D NAND flash. The new flash won't be available for a few years, but that makes it no less exciting. We have yet to see 72-layer 3D from Sk Hynix in our lab, but it will begin shipping soon in the PC401 using 256Gbit TLC die, according to the UNH-IOL list of tested products.

The information we found about the successor to 256Gbit 72-layer 3D TLC shows 96 layers with 512Gbit die capacity. The follow up to that is a massive 1Tbit die from 128-layer TLC from the other South Korean SSD manufacturer with full vertical integration.

Toshiba (or whichever company acquires Toshiba's memory division) may be more likely to introduce QLC 3D NAND.

Previously:
SK Hynix Plans 72-Layer 512 Gb NAND for Late 2017
64-Layer 3D NAND at Computex

Original Submission

takyon writes:

SSDs with 64 layers of 3D NAND are now available:

Today Intel is introducing their SSD 545s, the first product with their new 64-layer 3D NAND flash memory and, in a move that gives Intel a little bit of bragging rights, the first SSD on the market to use 64-layer 3D NAND from any manufacturer.

The Intel SSD 545s is a mainstream consumer SSD, which these days means it's using the SATA interface and TLC NAND flash. The 545s is the successor to last year's Intel SSD 540s, which was in many ways a filler product to cover up inconvenient gaps in Intel's SSD technology roadmap. When the 540s launched, Intel's first generation of 3D NAND was not quite ready, and Intel had no cost-competitive planar NAND of their own due to skipping the 16nm node at IMFT. This forced Intel to use 16nm TLC from SK Hynix in the 540s. Less unusual for Intel, the 540s also used a third-party SSD controller: Silicon Motion's SM2258. Silicon Motion's SSD controllers are seldom the fastest, but performance is usually decent and the cost is low. Intel's in-house SATA SSD controllers were enterprise-focused and not ready to compete in the new TLC-based consumer market.

[...] Intel will be using their smaller 256Gb 64L TLC die for all capacities of the 545s, rather than adopting the 512Gb 64L TLC part for the larger models. The 512Gb die is not yet in volume production and Intel plans to have the full range of 545s models on the market before the 512Gb parts are available in volume. Once the 512Gb parts are available we can expect to seem them used in other product families to enable even higher drive capacities, but it is reassuring to see Intel choosing the performance advantages of smaller more numerous dies for the mainstream consumer product range. Meanwhile, over the rest of this year, Intel plans to incorporate 64L 3D NAND into SSDs in every product segment. Most of those products are still under wraps, but the Pro 5450s and E 5100s are on the way as the OEM and embedded versions of the 545s.

Previously: SK Hynix Plans 72-Layer 512 Gb NAND for Late 2017
64-Layer 3D NAND at Computex
SK Hynix Developing 96 and 128-Layer TLC 3D NAND

Original Submission

takyon writes:

Western Digital has announced that it will begin production of 96-layer 3D NAND in 2018. It will make triple-level cell and quad-level cell NAND with die capacities ranging from 256 Gb to 1 Tb. QLC NAND is predicted to have 100-150 program/erase cycles (endurance) compared to about 1000 for TLC:

Given such endurance, it is logical to expect 3D QLC NAND to be used for primarily removable storage as well as for ultra-high capacity datacenter drives for the so-called near-WORM (write once read many) storage applications. For example, Toshiba last year discussed a QLC-based datacenter SSD with 100 TB capacity for WORM apps.

Western Digital plans to begin sampling of select 96-layer BiCS4 3D NAND configurations in the second half of this year, but the manufacturer does not specify which dies will sample when. As for mass production, Western Digital intends to start volume manufacturing of their 96-layer 256 Gb 3D NAND in 2018, with other dies to follow later. Based on Western Digital's announcements made earlier, the company will gradually introduce more sophisticated BiCS4 96-layer configurations in 2018 and 2019, before moving to BiCS5 sometimes in 2020. That said, it makes sense to expect the highest capacity BiCS4 ICs to ship later rather than sooner.

[BiCS = "Bit-Cost Scaling". Yes, it does not make sense to me, either. --Ed.]

Original Submission

takyon writes:

While QLC NAND is predicted to have as low as 100 program/erase cycles (endurance), Toshiba has "targeted" 1000 cycles for its upcoming 3D QLC NAND products:

Toshiba last week announced its first 3D NAND flash memory chips featuring [the] QLC (quadruple level cell) BiCS architecture. The new components feature 64 layers and developers of SSDs and SSD [controllers] have already received samples of the devices, which Toshiba plans to use for various types of storage solutions.

[...] Besides [its] intention to produce 768 Gb 3D QLC NAND flash for the aforementioned devices, the most interesting part of Toshiba's announcement is [the] endurance specification for the upcoming components. According to the company, its 3D QLC NAND is targeted for ~1000 program/erase cycles, which is close to TLC NAND flash. This is considerably higher than the amount of P/E cycles (100 – 150) expected for QLC by the industry over the years. At first thought, it comes across [as] a typo - didn't they mean 100?. But the email we received was quite clear:

- What's the number of P/E cycles supported by Toshiba's QLC NAND?
- QLC P/E is targeted for 1K cycles.

Endurance miracle putting QLC on par with TLC, or idle talk about a product that won't be out for 1-2 years?

[Ed. note: If you're wondering what QLC NAND is, here's a quick primer.]

Additional Coverage: The guru of 3D

Original Submission

takyon writes:

While other manufacturers are making 512 Gb to 1 Tb 3D NAND flash dies, Toshiba is using through-silicon vias (TSVs) to stack their dies, effectively cramming 384 to 768 layers of 3D NAND into a single chip. Toshiba announced that it was developing this capability back in 2015, and now the first products to use it will be available in 2018:

Toshiba on Wednesday introduced its first BiCS 3D TLC NAND flash chips with 512 GB and 1 TB capacities. . The new ICs stack 8 or 16 3D NAND devices using through silicon vias (TSVs) and are currently among the highest capacity non-volatile memory stacks available in the industry. Commercial products powered by the 512 GB and 1 TB packages are expected to hit the market in 2018, with an initial market focus on high-end enterprise SSDs

Stacking NAND devices to build high capacity flash memory ICs has been used for years to maximize the capacities and performance of SSDs and other solid state storage devices. In many cases, NAND makers use wire-bonding technique to stack multiple memory devices, but it makes packages larger and requires a lot of power for reliable operation. However in more recent years, Toshiba has adopted TSV techniques previously used for ASIC and DRAM devices to stack its NAND ICs, which has enabled it to shrink size of its NAND packages and reduce their power consumption.

TSVs are essentially electrodes that penetrate the entire thickness of a silicon die and connect the dies above and below it in the stack. A bus formed by TSVs can operate at a high data transfer rate, consume less power, and take up less space than a bus made using physical wires. Since 3D NAND is based on vertically stacked memory layers and has numerous vertical interconnects, so far Toshiba has not used TSVs to interconnect such devices. To wed TSV and 3D NAND, Toshiba had to develop a special 512 Gb BiCS NAND die featuring appropriate electrical conductors.

The devices both measure 14 mm × 18 mm. The 8-stack chip has a height of 1.35 mm, and the 16-stack chip has a height of 1.85 mm.

Toshiba press release.

takyon writes:

Both Toshiba (or whomever ends up buying Toshiba's memory fabrication assets) and Western Digital (WD) have both recently announced plans to produce 3D QLC (four bits per cell) NAND:

Western Digital's SanDisk subsidiary and Toshiba have a long history of jointly developing and manufacturing NAND flash memory. While that relationship has been strained by Toshiba's recent financial troubles and attempts to sell of their share of the memory business, the companies are continuing to develop new flash memory technology and are still taking turns making new announcements. In recent months both companies have started sampling SSDs using their 64-layer BiCS3 TLC 3D NAND and have announced that their next generation BiCS4 3D NAND will be a 96-layer design.

Yesterday Western Digital made a small announcement about their other main strategy for increasing density: storing more bits per memory cell. Western Digital will introduce four bit per cell QLC parts built on their 64-layer BiCS3 process, with a capacity of 768Gb (96GB) per die. This is a substantial increase over the 512Gb BiCS3 TLC parts that will be hitting the market soon, and represents not only an increase in in bits stored per memory cell but an increase in the overall size of the memory array. These new 3D QLC NAND parts are clearly intended to offer the best price per GB that Western Digital can manage, but Western Digital claims performance will still be close to that of their 3D TLC NAND. Western Digital's announcement did not mention write endurance, but Toshiba's earlier announcement of 3D QLC NAND claimed endurance of 1000 program/erase cycles, far higher than industry expectations of 100-150 P/E cycles for 3D QLC and comparable to 3D TLC NAND.

Western Digital will showcase SSDs and removable flash media using QLC NAND at the Flash Memory Summit from August 8-10.

Will QLC NAND endurance become a bigger issue than it is with TLC? Will this be used primarily for high density cold storage like Facebook has asked for?

Previously: Toshiba Teasing QLC 3D NAND and TSV for More Layers
SK Hynix Developing 96 and 128-Layer TLC 3D NAND
Western Digital Announces 96-Layer 3D NAND, Including Both TLC and QLC
Toshiba's 3D QLC NAND Could Reach 1000 P/E Cycles
Toshiba Develops 512 GB and 1 TB Flash Chips Using TSV

Original Submission

takyon writes:

Samsung will use QLC NAND to create a 128 TB SSD:

For now, let's talk about the goods we'll see over the next year. The biggest news to come out of the new Samsung campus is QLC flash. Samsung's customers set performance and endurance specifications and don't care about the underlying technology as long as those needs are met. Samsung says it can achieve its targets with its first generation QLC (4-bits per cell) V-NAND technology.

The first product pre-announcement (it doesn't have a product number yet) is a 128TB SAS SSD using QLC technology with a 1TB die size. The company plans to go beyond 16 die per package using chip stacking technology that will yield 32 die per package, a flash industry record.

NAND revenue has increased 55% in one year.

Previously: Seagate Demonstrates a 60 TB 3.5" SSD
Toshiba Envisions a 100 TB QLC SSD in the "Near Future"
Western Digital Announces 96-Layer 3D NAND, Including Both TLC and QLC
Toshiba's 3D QLC NAND Could Reach 1000 P/E Cycles

Original Submission

takyon writes:

The explosive growth in the NAND flash market may be slowing down:

After a blistering year-and-a-half long surge, a sudden drop in some memory prices, followed by Samsung Electronics Co's disappointing profit estimate, is causing jitters among investors who had bet the chip boom would last at least another year.

Amid news that the market has started losing some steam - prices of high-end flash memory chips, which are widely used in smartphones, dropped nearly 5 percent in the fourth quarter - some analysts now expect the industry's growth rate will fall by more than half this year to 30 percent.

That led shares in Samsung to dip 7.5 percent last week, while its home rival SK Hynix fell 6.2 percent. But analysts say that there is unlikely to be a sudden crash, and that 2018 should be a relatively stable year for chipmakers.

The $122 billion memory chip industry has enjoyed an unprecedented boom since mid-2016, expanding nearly 70 percent in 2017 alone thanks to robust growth of smartphones and cloud services that require more powerful chips that can store more data.

Previously: Samsung Set to Outpace Intel in Semiconductor Revenues
Chaos as Toshiba Tries to Sell Memory Business
IC Insights Predicts Additional 40% Increase in DRAM Prices
Expect 20-30% Cheaper NAND in Late 2018

Original Submission

takyon writes:

Samsung has announced a 30.72 TB SSD. It uses 64-layer 512 Gb TLC NAND dies, with 16 of each stacked to make a 1 TB package. It has 40 GB of DDR4 DRAM cache, also using layered packages:

The PM1643 drive also applies Through Silicon Via (TSV) technology to interconnect 8Gb DDR4 chips, creating 10 4GB TSV DRAM packages, totaling 40GB of DRAM. This marks the first time that TSV-applied DRAM has been used in an SSD.

Complementing the SSD's hardware ingenuity is enhanced software that supports metadata protection as well as data retention and recovery from sudden power failures, and an error correction code (ECC) algorithm to ensure high reliability and minimal storage maintenance. Furthermore, the SSD provides a robust endurance level of one full drive write per day (DWPD), which translates into writing 30.72TB of data every day over the five-year warranty period without failure. The PM1643 also offers a mean time between failures (MTBF) of two million hours.

Samsung started manufacturing initial quantities of the 30.72TB SSDs in January and plans to expand the lineup later this year – with 15.36TB, 7.68TB, 3.84TB, 1.92TB, 960GB and 800GB versions – to further drive the growth of all-flash-arrays and accelerate the transition from hard disk drives (HDDs) to SSDs in the enterprise market.

Also at Ars Technica and The Verge.

Related: SK Hynix Plans 72-Layer 512 Gb NAND for Late 2017
SK Hynix Developing 96 and 128-Layer TLC 3D NAND
Western Digital Announces 96-Layer 3D NAND, Including Both TLC and QLC
Toshiba Develops 512 GB and 1 TB Flash Chips Using TSV
Expect 20-30% Cheaper NAND in Late 2018

Original Submission

takyon writes:

Western Digital Begins to Sample QLC BiCS4: 1.33 Tbit 96-Layer 3D NAND

Western Digital has started sampling its 96-layer 3D NAND chips featuring QLC architecture that stores four bits per cell. The chip happens to be the world's highest-capacity 3D NAND device. The company expects to commence volume shipments of this memory chip already this calendar year.

Western Digital's 96-layer BICS4 3D QLC NAND chip can store up to 1.33 Tb of raw data, or around 166 GB. The IC will be initially used for consumer products Western Digital sells under the SanDisk brand, so think of memory cards (e.g., high-capacity SD and microSD products), USB drives, and some other devices. The manufacturer expects its 3D QLD[sic] NAND memory to be used in a variety of applications, including retail, mobile, embedded, client, and enterprise, but does not elaborate on timing at this point.

The 1.33-Tb BICS4 IC is Western Digital's second-gen 3D QLC NAND device. Last year the company announced its BICS3 64-layer 3D QLC chips featuring a 768 Gb capacity, but it is unclear whether they have ever been used for commercial products. Meanwhile, it is clear that the device was used to learn about 3D QLC behavior in general (i.e., endurance, read errors, retention, etc.)

[...] What is noteworthy is that officially the BiCS4 range was to include both TLC and QLC ICs with capacities ranging from 256 Gb to 1 Tb, so the 1.33 Tb IC is a surprising addition to the lineup which signals Western Digital's confidence of its technology.

Recent products have been using 512 Gb per die NAND, with 768 Gb and 1 Tb on the horizon. Samsung's announced 128 TB SSD was supposed to use 1 Tb 3D QLC dies, so ~1.33 Tb dies could bring that capacity to about 170 TB. Given a couple more generations of NAND or some fancy die/package stacking, and we will probably see a 1 petabyte SSD.

takyon writes:

SK Hynix Starts Production of 128-Layer 4D NAND, 176-Layer Being Developed

SK Hynix has announced it has finished development of its 128-layer 1 terabit 3D TLC NAND flash. The new memory features the company's charge trap flash (CTF) design, along with the peripheral under cells (PUC) architecture that the company calls '4D' NAND, announced some time ago. The new 128-layer TLC NAND flash devices will ship to interested parties in the second half of this year, and SK Hynix intends to offer products based on the new chips in 2020.

[...] In the first half of next year SK Hynix promises to roll out its UFS 3.1 storage products based on the new 1 Tb devices. The company plans to offer 1 TB UFS 3.1 chips that will consume up to 20% less [power] when compared to similar products that use 512 Gb ICs.

[...] String stacking technology, as well as the multi-stacked design, will enable SK Hynix to keep increasing the number of layers. SK Hynix says that it is currently developing 176-layer 4D NAND flash, but does not disclose when it is expected to become available.

Previously: "String-Stacking" Being Developed to Enable 3D NAND With More Than 100 Layers
SK Hynix Developing 96 and 128-Layer TLC 3D NAND

Related: Expect 20-30% Cheaper NAND in Late 2018
Micron: 96-Layer 3D NAND Coming, 3D XPoint Sales Disappoint
Western Digital Samples 96-Layer 3D QLC NAND with 1.33 Tb Per Die
Samsung Shares Plans for 96-Layer TLC NAND, QLC NAND, and 2nd-Generation "Z-NAND"

Original Submission

takyon writes:

RAM has never been cheaper, but are the historic prices here to stay?

RAM prices are at historic lows. But it hasn't always been that way. If you upgraded your PC's memory in 2018, you might be kicking yourself right now. This writer certainly is. I upgraded from an old, faithful 16GB of 1,600MHz DDR3 to a 16GB kit of Corsair Vengeance RGB 3,000MHz DDR4. It cost me the equivalent of $200 at the time. That same kit today is just $75. What the hell happened? As of mid-2019, prices have finally gotten under control and are currently at an all-time low, making this a great time to upgrade. But is it here to stay?

[...] Ben Miles, managing director of award-winning British system builder Chillblast, explained that "more and more memory foundries [are focusing] on flash type memory to feed the insatiable smart device and mobile phone industries. Turning a DRAM factory into a flash factory or vice versa takes many weeks, so when companies have chosen their path, its[sic] non-trivial to turn it back. When demand outstrips supply, module vendors are forced to stockpile DRAM chips and offer more money to secure stock, driving up prices."

All of this led to a huge increase in RAM prices between 2016 and 2018. Gamers Nexus put together an in-depth report on this at the start of 2018 and showed the near 200 percent increases in price for some modules, both DDR3 and DDR4. Looking at PCPartPicker's historic trend graphs, we can see that early-2018 was the peak for RAM pricing, but that many speeds and kits took many months to even approach a noticeable fall in price throughout the year, only really falling hard in 2019.

[...] "We don't see the current low price of memory being the new normal," Ben Miles of Chillblast said. "As profits fall in DRAM due to abundance, factories switch focus back to flash, so we can expect peak demand in Q4 to see rising prices once again." [Corsair's public relations manager Justin Ocbina] was a little more hesitant to forecast price rises, but he did suggest that other industries were beginning to pick up the slack for the slowing smartphone market. That could lead to rising prices at some point in the near future.

There's also DDR5 to consider. We've heard a lot about the potential capabilities of this next-generation memory for years, and that's something that Corsair will be switching its attention to in the years to come. Ocbina said that from the get-go, it is expected to dethrone DDR4 from its premium, performance spot. That gap will only widen as more kits are launched following the new standard's debut.

"Historic" low prices (that are about the same per GB as in 2012 or 2015)? Nothing DDR5 and a flood, power outage, or nitrogen leak can't fix.

See also: Micron's DRAM Update: More Capacity, Four More 10nm-Class Nodes, EUV, 64 GB DIMMs

Previously: Expect 20-30% Cheaper NAND in Late 2018
Weak Demand for DRAM Could Lead to Price Decreases in 2019
DRAM Prices Will Continue to Decline in Q1/Q2 2019
Huawei Blacklisting Predicted to Cause DRAM Prices to Drop 15%

Related: Manufacturing Memory Means Scribing Silicon in a Sea of Sensors

Original Submission